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IP / SOC Products News

• Weebit Nano tapes-out first 22nm demo chip (Tuesday Jan. 03, 2023)
  Weebit Nano Limited has taped-out (released to manufacturing) demonstration chips integrating its embedded Resistive Random-Access Memory (ReRAM) module in an advanced 22nm FD-SOI (fully depleted silicon on insulator) process technology.
  
  
• Digital Blocks DMA Controller Verilog IP Core Family Extends Leadership with enhancements to AXI4 Memory Map and Streaming Interfaces (Monday Jan. 02, 2023)
  Digital Blocks, a leading developer of silicon-proven semiconductor Intellectually Property (IP) soft cores for system-on-chip (SoC) ASIC, ASSP, & FPGA developers, announces enhancements to DMA Controller Verilog IP Core offerings with capabilities to stream data to and from memory such as between Network Interfaces and System Memory.
  
  
• Cadence Announces Industry Best-In-Class 8533Mbps LPDDR5X IP Solution for Next-Generation AI, Automotive and Mobile Applications (Monday Dec. 26, 2022)
  Cadence Design Systems, Inc. (Nasdaq: CDNS) today announced the first LPDDR5X memory interface IP design optimized to operate at 8533Mbps—up to 33% faster than the previous generation of LPDDR IP.
  
  
• BSC develops four open-source hardware components based on RISC-V, contributing to open, reliable and high-performance safety-critical systems for industry (Thursday Dec. 22, 2022)
  BSC expertise has led to the development of the open-source modules SafeSU, SafeDE, SafeDM, SafeTI that support verification and validation (V&V) processes and safety measure deployment to guarantee that the project’s safety goals are met. They have already been integrated with Advanced Microcontroller Bus Architecture (AMBA) protocols such as AMBA Advanced High-performance Bus (AHB) and AMBA Advanced eXtensible Interface 4 (AXI4).
  
  
• IPrium releases 100 Gbps Polar Encoder and Decoder (Thursday Dec. 22, 2022)
  FPGA intellectual property (IP) provider IPrium LLC (www.iprium.com) has today announced that it has expanded its family of multigigabit FEC Encoder and Decoder IP products with a new 100 Gbit/s Polar FEC.
  
  
• DDMA, multi-channel DMA Controller IP core from DCD-SEMI (Thursday Dec. 15, 2022)
  The DDMA is a four-channel Direct Memory Access Controller, with purpose to transfer data between memories and peripherals – to significantly reduce CPU utilization during data transfers. It can be programmed by any CPU via a 32-bit or 8-bit native interface.
  
  
• Latest aiWare4+ automotive NPU brings enhanced programmability, flexibility and scalability while retaining highest efficiency (Wednesday Dec. 14, 2022)
  aiMotive, one of the world’s leading suppliers of scalable modular automated driving technologies, today announced the latest release of its award-winning aiWare automotive NPU hardware IP. aiWare4+ builds on the success of aiWare4 in production automotive SoCs, such as Nextchip’s Apache5 and Apach6, by refining the hardware architecture and significantly upgrading the software SDK.
  
  
• LeWiz released RISC-V with OmniXtend clustering technology to open source. (Tuesday Dec. 13, 2022)
  OmniXtend is an open source architecture for clustering of processors (or servers) to remote storage and memory systems on the network. It allows processors such as RISC-V CPU(s) to execute programs stored remotely on network based storage or memory systems.
  
  
• Faraday Unveils SONOS eFlash Platform with Infineon on UMC 40uLP (Tuesday Dec. 13, 2022)
  Faraday Technology Corporation (TWSE: 3035), a leading ASIC design service and IP provider, today announced it has collaborated with Infineon to develop a SONOS eFlash platform on UMC’s 40uLP process.
  
  
• Codasip launches SecuRISC5 initiative (Monday Dec. 12, 2022)
  Codasip today launched SecuRISC5, a Codasip initiative to provide its customers with safe and secure custom compute using highly verified reference designs combining Codasip IP and third-party technology.
  
  
• MIPS Announces Availability of its first RISC-V IP core - the eVocore P8700 Multiprocessor (Monday Dec. 12, 2022)
  As the shift toward RISC-V accelerates across industries, the open standard instruction set architecture (ISA) is ushering a new wave of innovation and collaboration. In an effort to help fuel this trend, MIPS, a leading developer of highly scalable RISC processor IP, has announced availability of the eVocore(™) P8700, the industry’s highest performance, most scalable RISC-V multiprocessor IP.
  
  
• Andes Technology Unveils the AndesCore™ D23, a Feature-Rich, Low-Power and Highly-Secured Entry-Level RISC-V Processor (Thursday Dec. 08, 2022)
  Andes Technology today announces the details of the AndesCore™ D23, a new 3-stage 32-bit RISC-V CPU core, to target embedded processing and IoT applications that require low power and high efficiency in a small footprint.
  
  
• Andes Announces RISC-V Multicore 1024-bit Vector Processor: AX45MPV (Thursday Dec. 08, 2022)
  Andes Technology today proudly announces the new member of popular AndesCore™ 45-Series, the AX45MPV with Linux multicore and 1024-bit vector processing capabilities.
  
  
• IEEE802.11n/ac/ax Wi-Fi LDPC Encoder and Decoder FEC IP Core Available For Licensing and Implementation from Global IP Core (Tuesday Dec. 06, 2022)
  Global IP Core Sales - The new IEEE802.11n/ac/ax Wi-Fi LDPC Encoder and Decoder FEC IP Core is developed for high throughput WLAN applications. The IEEE802.11n/ac/ax Wi-Fi LDPC Codec FEC supports key features such as: Throughput matching the required specification, Bit-error-rate and packet-error-rate performance meeting the required specifications.
  
  
• Xiphera Launches xQlave™ Product Family of Quantum-Secure Cryptographic IP Cores (Thursday Dec. 01, 2022)
  Xiphera, Ltd, a Finnish company designing and implementing hardware-based security solutions with proven and standardised cryptographic algorithms, launched today their new xQlave™ product family for Post-Quantum Cryptographic (PQC) IP cores.
  
  
• DMP Launches "ZIA SV" Stereo Vision IP for AMD Xilinx Adaptive Computing Devices (Monday Nov. 28, 2022)
  The ZIA SV can be used in combination with AMD Xilinx adaptive computing devices to deliver stereo vision capable of high-performance, high-accuracy range estimation. DMP has qualified the ZIA SV with Zynq™ UltraScale+ (ZU3EG and ZU6CG) adaptive SoCs, Zynq UltraScale+ MPSoC ZCU104 Evaluation Kit and the Kria™ KV260 Vision AI Starter Kit.
  
  
• IPrium releases CCSDS TM Telemetry AR4JA LDPC Encoder and Decoder (Thursday Nov. 24, 2022)
  FPGA intellectual property (IP) provider IPrium LLC has today announced that it has expanded its family of LDPC Encoder and Decoder IP products with a new AR4JA LDPC for CCSDS 131.0 Telemetry TM synchronization and channel coding standard.
  
  
• intoPIX enables JPEG XS high frame rates real-time encoding from 120fps to more than 1000fps with the TicoXS FPGA IP-cores (Thursday Nov. 17, 2022)
  intoPIX, the leading provider of lightweight low-latency compression solutions, today announced the release of new HFR capabilities in its large range of available JPEG XS capable encoders and decoders, called TicoXS.
  
  
• Cadence Introduces Industry's Leading-Performance, Silicon-Proven 22Gbps GDDR6 IP at TSMC N5 (Wednesday Nov. 16, 2022)
  Cadence Design Systems, Inc. (Nasdaq: CDNS) today announced that Cadence® IP for GDDR6 is silicon proven on TSMC’s N5 process technology, exceeding Cadence’s previous 16Gbps designs.
  
  
• Arasan announces MIPI CSI IP for FPGA supporting full C-PHY 2.0 speeds (Monday Nov. 14, 2022)
  Arasan has released an all new version of its MIPI CSI IP compliant with the CSI-2 v3.0 specifications supporting C-PHY v2.0 speeds of up to 54.72Gbps operating at 8 Gsps (for 1channel) for FPGA designs.
  
  
• ZeroPoint Technologies can reduce data center energy consumption by 25% (Monday Nov. 14, 2022)
  ZeroPoint Technologies AB today announced that they provide a technology that can reduce the data center energy consumption by 25%.
  
  
• Bringing next-level 3D gaming to life with Arm Immortalis (Friday Nov. 11, 2022)
  With the announcement of MediaTek’s Dimensity 9200 SoC, we’re marking another significant milestone with the first implementation of the full Arm TCS22 on TSMC 4nm. Further, it highlights MediaTek’s dual commitment to incredible performance and intelligent, power efficient design for the next generation of smartphones built on Dimensity 9200.
  
  
• ShortLink AB and Dolphin Design partner to create a highly energy-efficient Sub-GHz ASIC design platform (Friday Nov. 11, 2022)
  ShortLink AB and Dolphin Design announce their partnership in the frame of Dolphin Design’s GoASIC! Program. The two companies bring together their respective breakthrough IPs and SoC design expertise to build a comprehensive design platform for the design of Sub-GHz enabled wireless ASICs.
  
  
• Arasan announces MIPI DSI IP for FPGA supporting full C-PHY 2.0 speeds (Tuesday Nov. 08, 2022)
  Arasan has released an all new version of its MIPI DSI IP compliant with the DSI-2 v1.0 Specifications supporting C-PHY v2.0 speeds of up to 54.72Gbps operating at 8 Gbps (for 1channel) for FPGA designs. This IP is designed to meet FPGA timing limitations to run at slower frequencies at less than 200 Mhz while still providing the necessary bandwidth.
  
  
• NSITEXE develops "DR4100" General Purpose Accelerator for SoC (Friday Nov. 04, 2022)
  NSITEXE is pleased to announce the “DR4100”, a high-end accelerator for the “Akaria” product brand, which focuses on processor IP for a wide range of next-generation embedded systems.
  
  
• Andes Technology Unveils The AndesCore® AX60 Series, An Out-Of-Order Superscalar Multicore RISC-V Processor Family (Wednesday Nov. 02, 2022)
  The family of processors are intended to run heavy-duty OS and applications with compute intensive requirements such as advanced driver-assistance systems (ADAS), artificial intelligence (AI), augmented/virtual reality (AR/VR), datacenter accelerators, 5G infrastructure, high-speed networking, and enterprise storage.
  
  
• Surecore's Low Power Memory Delivers Improved Power Efficiency For BLE-Enabled Devices (Wednesday Nov. 02, 2022)
  The Bluetooth Low Energy (BLE) wireless interface has dramatically cut power consumption for many applications, although its ubiquity has once again raised the stakes among developers by pushing them to reconsider a range of design trade-offs that can squeeze yet more operating life between re-charges. One key area now being prioritised is the on-chip embedded SRAM.
  
  
• SiFive's New High-Performance Processors Offer a Significant Upgrade for Wearable and Consumer Products (Tuesday Nov. 01, 2022)
  The SiFive Performance™ P670 and P470 RISC-V processors bring unparalleled compute performance and efficiency that is significantly raising the bar for innovative designs in these high-volume markets.
  
  
• Quadric's New Chimera GPNPU Processor IP Blends NPU and DSP into New Category of Hybrid SoC Processor (Tuesday Nov. 01, 2022)
  Quadric today introduced Chimera™, the first family of general-purpose neural processors (GPNPUs), a semiconductor intellectual property (IP) offering that blends the machine learning (ML) performance characteristics of a neural processing accelerator with the full C++ programmability of a modern digital signal processor (DSP).
  
  
• Floadia Announces MTP IP without extra Mask Available on 55nm (Monday Oct. 31, 2022)
  Floadia Corporation (Floadia), a leading provider of embedded non-volatile memory intellectual property (IP) announces that its high-quality Multi-Time Programmable memory IP (MTP) is now available on the 55nm process platform with the product name “ZT”, which is capable of 10 years data retention at 85 degrees Celsius.