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IP / SOC Products News

• Rambus India High-Speed I/O Design Team Achieves First Silicon Success; TSMC 90nm PCI Express* 2.5Gbps design fully characterized and compliant to specification (Monday Nov. 20, 2006)
  Based on Rambus’ proven high-speed PHY architecture, the PCI Express* design is optimized for TSMC’s 90nm process node and fully functional in silicon with all necessary tests checked at its maximum data rate of 2.5GHz. The silicon sample meets characterization across voltage and temperature ranges in compliance with the PCI-SIG® specification.
  
  
• Xilinx Strengthens Industrial Networking Solutions with EtherCAT Technology (Thursday Nov. 16, 2006)
  Fastest Industrial Ethernet Technology Now Available for Xilinx FPGAs
  
  
• Faraday Pioneers in Providing On-Chip Variation (OCV) Information for Cell Libraries (Thursday Nov. 16, 2006)
  Faraday's advanced built-in OCV library provides location, level, and cell-based OCV analysis to address the effects of on-chip statistical process variation, which can no longer be ignored in 0.13 µm designs or below.
  
  
• Virage Logic and MIPS Technologies Collaborate to Offer Core-Optimized IP Kits for MIPS32(R) 24K(R), 24KE(TM) and 34K(TM) Core Families Via www.viragelogic.com (Wednesday Nov. 15, 2006)
  Leveraging Virage Logic's Area, Speed and Power (ASAP) Memory(TM) and ASAP Logic(TM) High-Speed (HS) IP, the series of Core-Optimized IP Kits introduced earlier this year provides MIPS Technologies' customers with IP that is specifically tuned to enhance the performance of MIPS® processor cores.
  
  
• Chipidea Audio Codec IP Provides High Performance on Small Chip Area for Low Power Applications (Wednesday Nov. 15, 2006)
  The IP exhibits a unique blend of audio features, audio performance and risk-free integration for System-on-Chip (SoC) devices and multi-chip modules (McMs) targeting mobile audio, communications and multimedia systems.
  
  
• Freescale Opens Licensing of ColdFire Microcontroller Architecture to Embedded Customers (Tuesday Nov. 14, 2006)
  The V2 ColdFire core is available now for licensing through IPextreme Inc., semiconductor intellectual property (IP) licensing specialists. Specifically, IPextreme plans to market, sell and support the V2 ColdFire core to system-on-chip (SoC) designers seeking to integrate the core and other functions onto a single chip, helping them save time and money.
  
  
• IPextreme to Sell Cypress Semiconductor's USB 2.0 Low-Power Hub IP (Thursday Nov. 09, 2006)
  IPextreme Inc and Cypress Semiconductor Corp. have signed an agreement where IPextreme will sell and support Cypress’ well-proven USB 2.0 high speed hub intellectual property (IP) into third-party system chips
  
  
• Faraday Launches Universal Programmable SerDes IP (Tuesday Nov. 07, 2006)
  The high-performance interface solution is designed to meet industry requirements in terms of reduced die sizes and significant power savings, which further leads the customers to a more competitive and advantageous market position.
  
  
• Wipro's IEEE 1394 Intellectual Property Cores family completes a decade - is widely deployed in digital devices today (Monday Nov. 06, 2006)
  In 1996, Wipro started its Global Product Division to develop licensable Intellectual Property Cores. The first output of this group was Intellectual Property Cores in Physical and Link Layer for IEEE 1394 (Firewire) protocol
  
  
• Western Design Center Joins ispLeverCORE Connection Partners Program, Optimizes 8-bit 65xx Microprocessor IP Core for LatticeXP FPGA Devices (Monday Nov. 06, 2006)
  Lattice Semiconductor Corporation (NASDAQ: LSCC) today announced the availability of an 8-bit 65xx microprocessor intellectual property (IP) core from the Western Design Center (WDC), a new member of the ispLeverCORE™ Connection IP partners program
  
  
• Embedded FPGA to reach 65-nm in 2007, says M2000 (Wednesday Nov. 01, 2006)
  Claiming to be already delivering the densest embedded FPGA (eFPGA) at the 90-nanometer manufacturing node, M2000 SA is in the process of preparing FPGA intellectual property targeting 65-nanometer designs. The first 65-nm tapeout is expected during the first half of 2007, the company said.
  
  
• Lattice and IntelliProp Announce Partnership and CE-ATA Core Availability (Wednesday Nov. 01, 2006)
  Combination of CE-ATA IP Core and LatticeXP Non-Volatile FPGAs Provides Powerful Low-Cost Solution for Portable Storage Applications
  
  
• Ittiam Systems Introduces Multi Format High Definition Video Decoder Engine (Tuesday Oct. 31, 2006)
  Ittiam Systems today announced and showcased their High Definition Video Decoder Engine - MFVDEC (Multi-Format High Definition Video Decoder) IP - that forms the core of High Definition DVD and Set-Top Box ASIC solutions.
  
  
• Tensilica Adds Ogg Vorbis Decoder to Popular Xtensa HiFi 2 Audio Engine and Diamond 330HiFi Processor Core (Tuesday Oct. 31, 2006)
  Tensilica, Inc. today announced that it has added an Ogg Vorbis decoder for its popular Xtensa HiFi 2 Audio Engine and Diamond 330HiFi processor core.
  
  
• Synopsys to Release a Complete, Single Vendor Interface IP for High-Performance DDR2 SDRAM Memory Subsystems (Monday Oct. 30, 2006)
  Complete Solution Will Include Memory Controller and Mixed-Signal PHY to Reduce Risk and Speed System Integration
  
  
• Lattice Announces PCI Express Solutions for LatticeECP2M and LatticeSCM FPGAs (Monday Oct. 30, 2006)
  Successfully Tested Against PCI Express Version 1.0a Specifications, Solutions Enable Single-Chip, Programmable PCI Express Endpoints
  
  
• CEVA Debuts CEVA-X1641 - High-Performance Quad-MAC DSP Targeting Next-Generation Cellular and Portable Multimedia Applications (Monday Oct. 30, 2006)
  
  
  
• Synopsys' New DesignWare Bridge IP for PCI Express to AMBA 2.0 AHB Connects Two Industry Standard Protocols (Wednesday Oct. 25, 2006)
  Bridge Connects a Wealth of PCI Express Technology-Based Systems and Peripherals to AMBA 2.0 AHB Protocol-Based Designs
  
  
• ARM Announces The Release Of Multiple Standard Cell Libraries On TSMC 90nm and 65nm Processes (Wednesday Oct. 25, 2006)
  ARM has released multiple standard cell libraries on TSMC 90- nanometer (nm) and 65-nm processes covering a broad range of mobile and generic applications
  
  
• ARM Introduces New Advanced Embedded Memory Test And Repair System For Nanometer Technologies (Tuesday Oct. 24, 2006)
  emBISTRx BIST/BISR solution optimizes overall memory sub-system area and delivers higher chip yield and enhanced test quality
  
  
• Lattice Announces Availability of Serial RapidIO Core from Mercury Computer Systems (Monday Oct. 23, 2006)
  Lattice Announces Availability of Serial RapidIO Core from Mercury Computer Systems
  
  
• IMEC demonstrates multimedia decoding on reconfigurable processor with record power efficiency (Monday Oct. 23, 2006)
  IMEC developed a reconfigurable processor for video decoding achieving power efficiencies 6 to 12 times higher than state-of-the-art C-programmed processors. The processor was derived from IMEC’s C-programmable ADRES (Architecture for Dynamically Reconfig
  
  
• IP Cores, Inc. Obtains FIPS 197 Certification for AES1-32E IP Core (Wednesday Oct. 18, 2006)
  IP Cores, Inc. has obtained the Federal Information Processing Standards Publication 197 (FIPS 197) certification for its AES IP core, AES1-32E. National Institute of Standards and Technology (NIST) certificate number for AES1-32E is 450
  
  
• Xelic Announces Successful Integration of Industry's First 40Gb/s SONET/SDH Framer Core into Customer Equipment (Wednesday Oct. 18, 2006)
  Xelic, Inc. today announced the immediate availability of the industry’s first 40Gb/s SONET/SDH Framer Core (XCS768C). Xelic has successfully demonstrated this core in an FPGA implementation by verifying independent transmit and receive functions using in
  
  
• Gaisler Research extends the GRLIB IP library with GBit Ethernet (Monday Oct. 16, 2006)
  Gaisler Research AB announced that a GigaBit Ethernet IP (Intellectual Property) core is now available as a part of the GRLIB IP library.
  
  
• Domain Technologies announces Synthesizable MRAM8051 Microcontroller Netlist Library for Actel FPGAs Including Royalty-Free License for use in Tekmos Merged ASICs (Thursday Oct. 12, 2006)
  Domain Technologies announces the availability of the industry's first, royalty-free, synthesizable MCS8051 code-compatible microcontroller netlist library and software development kit for use with Actel FPGAs that also includes a royalty-free license to
  
  
• Novelics, a memory IP provider for versatile and differentiated memory IPs, announces its entry in the IP market (Wednesday Oct. 11, 2006)
  Founded in May 2005, Novelics comprises a team of seasoned engineering and management professionals whose backgrounds represent the convergence of three key areas: embedded memory volatile/non volatile memory (NVM) architectures, compiler design, and cust
  
  
• NovoBlox OTP Memory IP to Unveil at FSA Suppliers Expo (Wednesday Oct. 11, 2006)
  Novocell Semiconductor, Inc., a provider of advanced memory IP, will introduce NovoBlox OTP Memory IP at the FSA (Fabless Semiconductor Association) 2006 Suppliers Expo & Conference occurring October 11 at the San Jose McEnery Convention Center in San Jos
  
  
• MIPS Technologies Unveils New SOC-it(R) Platform Strategy for MIPS-Based(TM) SoCs (Tuesday Oct. 10, 2006)
  MIPS-Verified(TM) Platform to Simplify Design of High-Performance SoCs and Accelerate Time-to-Market
  
  
• Silicon Hive Announces New HiveFlex VSP2100 Series Processor Cores For HD Video Signal Processing (Tuesday Oct. 10, 2006)
  Advanced processor cores available by the end of this year enables highest quality video display on HD TVs and other video appliances