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IP / SOC Products News
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CEVA Unveils Wi-Fi IP Platforms to Enable a Broad Range of Connected Devices (Thursday Jun. 11, 2015)
CEVA today unveiled its RivieraWaves Wi-Fi IP platforms addressing the growing need to integrate Wi-Fi 802.11a/b/g/n/ac into a new class of System-on-Chips (SoCs) targeting a broad range of connected devices that comprise the Internet of Things (IoT).
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Algo-Logic Systems Launches Industry-First 40Gbps TCP Endpoint on Altera Stratix V for Datacenter Acceleration (Thursday Jun. 11, 2015)
Algo-Logic Systems today announced availability of their new 5th Generation 40G TCP Endpoint. The IP-Core enables FPGA-implemented logic to directly communicate over 40 Gigabit Ethernet networks with remote hardware or software devices and includes easy to use hardware application programming interface that supports multiple real-world accelerated datacenter use cases.
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8051 MCUs get In-System Programming Benefits Through CAST and SMH Technologies Partnership (Tuesday Jun. 09, 2015)
FlashRunner™ In-System Programmer (ISP) line from SMH Technologies supports 8051s from CAST; Live 8051 programming demo running in CAST’s DAC booth
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Imagination and TSMC collaborate on advanced IoT IP platforms (Monday Jun. 08, 2015)
Imagination Technologies and TSMC announce a collaboration to develop a series of advanced IP subsystems for the Internet of Things (IoT) to accelerate time to market and simplify the design process for mutual customers. These IP platforms, complemented by highly optimized reference design flows, bring together the breadth of Imagination’s IP with TSMC’s advanced process technologies from 55nm down to 10nm.
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Cadence Announces Collaboration with TSMC on IoT IP Subsystem (Monday Jun. 08, 2015)
Cadence today announced that it is collaborating with TSMC on the development of an Internet of Things (IoT) intellectual property (IP) subsystem demonstration platform for TSMC’s ultra-low power (ULP) process.
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Mixel Achieves First-Time Silicon Success with MIPI D-PHY RX+ Configuration (Monday Jun. 08, 2015)
Mixel announced today that its RX+ D-PHYSM IP is silicon-proven in both 40nm and 28nm process nodes and is going into high-volume production in customer’s product. The MIPI® D-PHY RX+ is a Mixel proprietary implementation of the Camera Serial Interface (CSISM) and Display Serial Interface (DSISM) D-PHY Receiver optimized for reduced area and power, while achieving full-speed production and in-system testing, and higher performance compared to traditional receiver configurations.
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Synopsys Accelerates Automotive SoC Development with Broad Portfolio of Silicon-Proven IP (Monday Jun. 08, 2015)
Synopsys today announced that it is accelerating automotive SoC development with a broad portfolio of silicon-proven IP for automotive applications. The DesignWare® IP portfolio includes Ethernet Audio Video Bridging (AVB), LPDDR4, MIPI CSI-2 and DSI, HDMI, PCI Express®, USB, Mobile Storage, Logic Libraries, Embedded Memories, Non-Volatile Memories (NVM), Data Converters, Synopsys ARC® EM processors with Safety Enhancement Package (SEP), EV vision processors and the Sensor and Control IP Subsystem.
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Synopsys and TSMC Collaborate to Develop Integrated IoT Platform for TSMC 40-nm Ultra-Low-Power Process (Monday Jun. 08, 2015)
Synopsys today announced a collaboration with TSMC to develop an integrated Internet of Things (IoT) platform on TSMC's 40-nm ultra-low-power (ULP) process technology.
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S3 Group Launches the Industry’s Smallest, Most Efficient 320MS/s ADC (Monday Jun. 08, 2015)
S3 Group today launched the industry’s smallest, most-efficient 320MS/s SAR-ADC (successive approximation register analog-to-digital converter). The product is the second in the family of SAR ADCs being developed by the company specifically optimized for next generation connected consumer Systems on Chip (SoCs).
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The i8051 legacy extended by Dolphin Integration with 32-bit RISC microcontrollers (Monday Jun. 08, 2015)
Dolphin Integration is proud to announce the availability of its RISC-351 Zephyr microcontroller. It enables 80x51 users to benefit from 32-bit microcontroller performances while leveraging the i51 legacy of peripherals and software.
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Menta Enhances eFPGA Technology, Improving Performance by 20% (Monday Jun. 08, 2015)
Menta SAS, a provider of embedded FPGA Intellectual Property (IP), today announced its third generation of embedded FPGA (eFPGA) technology. The FPGA fabric for SoC designs provides 20 percent better power performance area than the previous generation.
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eMemory Launches Ultra-Low Power MTP Silicon IP for IoT Applications (Friday Jun. 05, 2015)
eMemory Technology announced today its newly developed ultra-low power Multiple-Time Programmable (MTP) silicon IP offers superior features including 3μW low power consumption, 0.7V low operation voltage, over 100,000 times endurance, compact size, and excellent cost advantages.
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EnSilica launches eSi-32X0MP scalable, asymmetric multicore processor (Thursday Jun. 04, 2015)
EnSilica, a leading independent provider of semiconductor IP and services, has added to its family of eSi-RISC processor cores with the launch of the eSI-32X0MP scalable, asymmetric multicore processor.
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Think Silicon Launches Industry's Smallest Ultra-Low Power 3D GPU (Thursday Jun. 04, 2015)
Think Silicon announced today the immediate availability of NEMA|t100 the world smallest Internet-of-Things (IoT) Graphics Processor Unit (GPU) with real 3D functionality.
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Allegro DVT adds VP9 support to its multi-format hardware encoder IP (Tuesday Jun. 02, 2015)
Allegro DVT announces the immediate availability of its multi-format hardware video encoder IP with H.264/AVC, H.265/HEVC and VP9 support.
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Vivante Introduces Industry's First Vision IP with OpenVX and OpenCL (Monday Jun. 01, 2015)
Vivante® announces that its GC7000-XS VX is the first vision IP solution to achieve compliance with the OpenVX 1.0 specification—a major achievement that comes only seven months after the introduction of OpenVX and emphasizes the cutting-edge technology available in the GC7000-XS product line with the addition of vision acceleration to a core that already has photorealistic 3D rendering capabilities.
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Dolphin Integration's memories silicon proven at TSMC 90 nm eFlash (Monday Jun. 01, 2015)
Dolphin Integration is proud to announce that their memory offering at 90 nm eFlash process have fully passed the various stages of TSMC 9000 qualification. This guarantees innovative solutions with minimal risks and maximum reliability.
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IoT Subsystems from CAST and SoC Solutions Reduce Time to Market for Connected Products (Thursday May. 28, 2015)
CAST and SoC Solutions have partnered to give an advantage in productivity, functionality, and cost to developers in today’s competitive world of interconnected electronic devices. Instead of starting from scratch, these developers of Internet of Things (IoT), Machine-to-Machine (M2M), and other connected applications can purchase ready-to-run hardware/software subsystems that perform the functions they need in an optimized fashion.
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sureCore Limited Brings Its First Ultra-Low Power SRAM IP To Market (Thursday May. 28, 2015)
sureCore Ltd. today announced the immediate commercial availability of its first, ultra-low power, embedded SRAM IP. The new, silicon proven, 28nm FDSOI production design targets applications demanding long battery life with minimal operating and stand-by power performance.
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Dolphin Integration unveils a new generation of low-noise regulators for IoT at 55 nm (Monday May. 25, 2015)
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Digital Blocks Celebrates 18 Years of Offering 82xx Peripheral Replacements (Monday May. 25, 2015)
Digital Blocks, a leading developer of silicon-proven semiconductor Intellectually Property (IP) soft cores for system-on-chip (SoC) ASIC, ASSP, & FPGA developers with Embedded Processor & Peripherals requirements, celebrates the 18 th year of its Intel® 82xx Peripherals Replacement program.
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IP-Maker's NVMe IP to pass the compliance test at the UNH-IOL (Friday May. 22, 2015)
IP-Maker, the leading company in NVMe (NVM Express) technology has successfully passed de compliance test at the UNH-IOL (University of New Hampshire, InterOperability Laboratory).
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Synopsys Announces Industry's Lowest Power PCI Express 3.1 IP Solution for Mobile SoCs (Thursday May. 21, 2015)
Synopsys today announced the industry's lowest power controller and PHY IP solution for PCI Express® (PCIe®) 3.1 specification, significantly reducing both active and standby power consumption for mobile Systems-on-Chips (SoCs).
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ARM and UMC Target New 55nm ULP Physical IP Solution for Energy-Efficient Applications (Monday May. 18, 2015)
ARM and UMC today announced the availability of a new ARM® Artisan® physical IP solution on 55nm to accelerate the development of ARM processor-based embedded systems and Internet of Things (IoT) applications.
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CAN FD Bus Controller IP Core with ISO and non-ISO Compliance Available Now from CAST (Friday May. 15, 2015)
A new version of the CAN 2.0 and FD Bus Controller Core that supports both the current non-ISO and upcoming ISO specifications is now available from intellectual property provider CAST, Inc.
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CogniVue Delivers Key Weapon in the Battle for ADAS Market Share: "Opus" Vision Processing Core Enables Critical Competitive Advantages (Wednesday May. 13, 2015)
CogniVue announced that its new APEX Processing Core - Opus - is at the center of the intense battle for Advanced Driver Assistance Systems (ADAS) market share as challengers to Mobileye, the current market share leader, line up to capture business for next-generation ADAS systems.
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Cadence USB 3.0 Host Solution on TSMC 16nm FinFET Plus Process Achieves Industry Certification (Tuesday May. 12, 2015)
Cadence today announced that its USB 3.0 host IP solution for TSMC’s 16nm FinFET Plus (16FF+) process is one of the first to pass USB-IF compliance testing and receive USB-IF certification
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Sonics Introduces Semiconductor IP Industry's First Power Management Solution Combining Fine-Grain Partitioning and Autonomous Control (Tuesday May. 12, 2015)
Sonics today introduced the ICE-Grain (Instant Control of Energy) Power Architecture for system-on-chip (SoC) design teams that require an automated power management solution with “worry-free implementation” at the highest level of abstraction.
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Shikino Launches Still Image Encoder IP Obtaining "World-class speed" 32X faster image processing (Tuesday May. 12, 2015)
Shikino today announced that it has launched a new still image Encoder IP. As a new product from the "KJN series" with the world's top share in the still image compression/decompression technology, Shikino developed this still image encoder IP which has the world's highest image processing performance, 32X speed (32 data/clock) and the JPEG compression function with high bit depths (8-bit/10-bit/12-bit).
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Sercos IP Core for Xilinx 7 Series FPGAs and Zynq SoC Family Available (Monday May. 11, 2015)
Sercos International announced the availability of the Sercos III IP Core for Xilinx 7 series FPGAs and devices of the Zynq SoC family. The IP core is available for Sercos III master and slave controllers (SERCON100M/S) for automation devices.