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IP / SOC Products News

• Dolphin Integration announce the availability of new ROM TITAN and ultra low leakage standard cell library SESAME BIV at TSMC 55 nm LP eFlash (Tuesday Jul. 15, 2014)
  Dolphin Integration are proud to announce the availability of the new ROM TITAN and the ultra low leakage SESAME BIV at 55 nm LP eFlash. These two new products come to enrich the large panoply of Dolphin Integration at 55 nm LP eFlash, which now count: RAM, DpRAM, ROM, foundry sponsored ultra-high-density standard cell library and ultra-low-leakage standard cell library.
  
  
• IP-Maker targets FPGA-based data center storage applications (Tuesday Jul. 15, 2014)
  IP-Maker, the expert in intellectual property (IP) for high performance storage applications, is announcing the availability of its IP portfolio on 7-series Xilinx FPGAs, including NVMe (NVM Express), Universal NandFlash Controller and BCH ECC.
  
  
• VeriSilicon Introduces Hantro H2 HEVC Encoder Semiconductor IP (Tuesday Jul. 15, 2014)
  VeriSilicon today announced its next-generation Hantro H2 HEVC video encoder IP. Hantro H2 builds on the success of VeriSilicon’s Hantro H1 encoder IP, bringing ultra-high definition (UHD) and 4K resolution video encoding capability to the HEVC video format.
  
  
• Synopsys Cuts Area of DesignWare NVM IP for Automotive Grade 0 Applications by 75 Percent (Tuesday Jul. 08, 2014)
  Synopsys today announced the availability of the DesignWare AEON Trim NVM IP for high-voltage processes. The new IP is up to 75 percent smaller than alternative NVM IP solutions, helping to reduce the size and cost of automotive ICs.
  
  
• Silicon Vision Delivers Silicon Proven Bluetooth Smart RF IP on HHGrace's 0.11um Technology Platform (Tuesday Jul. 08, 2014)
  Silicon Vision, a leading provider of high-performance, low power radio frequency IP, and Shanghai Huahong Grace Semiconductor Manufacturing Corporation (“HHGrace”), one of the world-leading 8” pure play foundries, have jointly announced today their partnership to deliver Silicon Vision’s Bluetooth low energy (BLE) radio IP on HHGrace’s 0.11μm mixed-signal/RF technology platform.
  
  
• Audio Converter IP - Dolphin Integration exceed STB audio standards with 106 dB of SNR measured on PWM DAC qualifier (Monday Jul. 07, 2014)
  Integration has published the results of their pure digital Audio DAC based on two sound shapers enabling a high versatility in the choice of the application schematics. It confirms their position as the leading IP partner for Set-Top-Box applications.
  
  
• Crossbar Unveils Major Technical Innovation Behind Terabyte Storage-on-a-Chip (Monday Jun. 30, 2014)
  Crossbar, Inc., a start-up company pioneering 3D Resistive RAM (RRAM) technology, today disclosed further details behind its revolutionary non-volatile RRAM technology. The company announced it has demonstrated pre-production 1MB arrays using its patented “1TnR” (1 Transistor driving n Resistive memory cells) selectivity for read/write operations, representing a critical milestone toward commercializing terabyte scale memory arrays on a postage stamp size chip.
  
  
• Arasan Chip Systems Announces Availability of MIPI M-PHY 3.0 Gear 3 IP in UMC40LP (Thursday Jun. 26, 2014)
  -PHY 3.0 Gear 3 on UMC40LP joins the list of process node options, available from Arasan for customers designing UFS 2.0. The PHY has achieved 5.85Gbps performance, with BER smaller than 1E-10.
  
  
• MOSCAD Design & Automation Releases Ultra low-power Voltage regulator cell in 55nm (Wednesday Jun. 25, 2014)
  MOSCAD Design & Automation has released a new version of its ultra-low power voltage regulator cell in UMC 55nm Low Power CMOS process.
  
  
• Synopsys Announces Immediate Availability of Broad Portfolio of IP for TSMC 28HPC Process (Tuesday Jun. 24, 2014)
  The DesignWare IP portfolio for the TSMC 28HPC process delivers high performance with low leakage and active power in a compact footprint, giving designers the ability to optimize their mobile and internet-of-things (IoT) SoC designs for energy efficiency, area and speed.
  
  
• Barco Silex announces new AES-GCM core supporting up to 100 Gbps with optimized area (Thursday Jun. 19, 2014)
  Barco Silex announced today the new AES-GCM (BA415) IP core for 10 to 100 Gbps applications. The AES-GCM (Galois Counter Mode) is an authenticated encryption algorithm which combines the AES counter mode for encryption and the Galois field multiplier for the authentication.
  
  
• New High Performance, Low-Power ADC Designs from Teledyne DALSA's IC Design Group (Wednesday Jun. 18, 2014)
  Since integrating with the Teledyne DALSA family, our IC group (formerly Axiom IC) in Enschede, The Netherlands, has been hard at work creating new high performance mixed circuits and systems. We are pleased to announce the availability of our latest advances: low power high-resolution sigma-delta analog-to-digital converters for mobile applications.
  
  
• Digital Blocks Extends its I2C Controller IP Core Family with More Enhanced Capabilities & System-Level Features (Tuesday Jun. 17, 2014)
  Digital Blocks announces 2014 extensions to its DB-I2C-MS / DB-I2C-M / DB-I2C-S I2C Controller IP Core family
  
  
• Comcores Delivers Ultra-fast Common Public Radio Interface (CPRI) v.6.0 Intellectual Property enabling the next generation of silicon devices for LTE-Advanced (Friday Jun. 13, 2014)
  Comcores today announced the immediate availability of a low-size and low-power Common Public Radio Interface (CPRI) v6.0 IP solution targeting both Radio Equipment (RE) and Radio Equipment Controller (REC) modules
  
  
• Intilop releases a Series of 10G bit TCP & UDP Accelerators with 16K Concurrent Sessions and with unlimited rolling Sessions (Friday Jun. 13, 2014)
  The 6th generation industry leader with 77 nanosecond TCP& UDP latency and 95% throughput, Network Hardened, most mature and most widely adapted worldwide over the last 5 years, Intilop’s UDP & TCP Accelerators are targeted towards the next generation of Cloud Computing, Data Center, Telecomm and all other Hyper Performance Networked Computing applications.
  
  
• PLDA and GUC Announce a tested and reliable PCIe Controller and PHY combination, optimized for storage applications (Thursday Jun. 12, 2014)
  PLDA and GUC today announced a combined PCIe Gen 3 Controller IP and PHY IP solution, optimized for the needs of the storage market. The combined PCIe 3.0 Controller/PHY solution is in initial production and has been incorporated into a demo board.
  
  
• Rambus Cryptography Research Division Unveils CryptoManager Secure Feature Management Platform (Wednesday Jun. 11, 2014)
  Rambus today announced the CryptoManager™ platform, a feature management solution developed by the Rambus Cryptography Research (CRI) division. The CryptoManager platform consists of both a Security Engine and an Infrastructure suite that can dramatically improve efficiency and security during the manufacturing process.
  
  
• Semtech Announces Hybrid Memory Cube Compliant PHY IP (Tuesday Jun. 10, 2014)
  Semtech today announced the company has successfully completed electrical compliance testing of its Snowbush® 28nm Platform Physical Layer IP, in support of the Hybrid Memory Cube (HMC) specification for ultra fast, next-generation memory.
  
  
• Digital Blocks Releases 2nd Generation DB9200 Graphics Engine Verilog IP Core Targeting Hardware Accelerated Graphics Display Applications (Friday Jun. 06, 2014)
  Digital Blocks today releases an enhanced version of the DB9200 2D Graphics Engine Verilog IP Core for low footprint, high-performance hardware accelerated graphics applications.
  
  
• Semtech Adds New Ultra-low Power, Ultra-low Latency PCI Express 3.0 PHY to Snowbush IP Platform for Expanding Storage and Server Markets (Wednesday Jun. 04, 2014)
  Semtech today announced the addition of a new PCI Express® (PCIe®) 3.0 PHY IP Platform offering, part of the Snowbush® IP family, optimized for low power and low latency. Building on 14 successful PCIe 3.0 specification customer product tape-outs at 40nm, and six PCIe 3.0 specification customers on TSMC 28nm process, this new offering provides customers with lowest power and lowest latency, while meeting the reach requirements of compliance for PCI Express channels.
  
  
• Mobiveil Targets Altera's Arria V SoCs for Its NVMStor Enterprise SSD Storage Platform (Monday Jun. 02, 2014)
  Mobiveil today announced it has collaborated with Altera Corporation to port its NVMStor™ NVM Express platform to the Altera® Arria® V SoC. This platform provides equipment manufacturers and systems designers a highly configurable solid-state drive (SSD) solution that can be targeted for different flash capacity and performance requirements.
  
  
• Synopsys Redefines the IP Supplier Paradigm with New IP Accelerated Initiative (Monday Jun. 02, 2014)
  Synopsys today announced the IP Accelerated initiative to help designers significantly reduce the time and effort of integrating IP into their system-on-chips (SoCs). This initiative augments Synopsys' established broad portfolio of silicon-proven DesignWare® IP with the addition of new IP Prototyping Kits, IP Virtual Development Kits and customized IP subsystems to accelerate prototyping, software development and integration of IP into SoCs.
  
  
• Vivante Intros World's First Complete Line of GPUs for Wearables and IoT Starting at 0.3 mm2 (28nm) (Monday Jun. 02, 2014)
  Vivante today announced the immediate availability of the GCNano Series, the latest product offering to complete its wearables and IoT GPU line. The series includes the GCNano Lite, GCNano and GCNano Ultra, all architected for various wearable and IoT segments supporting the upcoming generation of customized MCU/MPU platforms that demand the most compact UI graphics hardware and software footprint.
  
  
• Memoir Systems' Renaissance Memory IP Available on TSMC 16nm FinFET (Monday Jun. 02, 2014)
  Memoir Systems Inc., today announced availability of its Renaissance soft memory IP cores for TSMC’s 16nm FinFET (16FF) designs and that it has six customer design wins with a few of them nearing tape out on this leading edge process node.
  
  
• Full-Hardware Real-Time H.265 HEVC Video Decoder Core Coming from CAST (Monday Jun. 02, 2014)
  CAST, Inc. is demonstrating here at DAC a new, high-performance, low-power, full-hardware H.265 video decoder core that handles next-generation video steams in real time without need for software computations running on a central processing unit (CPU). The new H.265-MPI-D Main Profile Intra HEVC Decoder Core is the first in a series of H.265 High Efficiency Video Coding cores CAST will offer, and will be available in the third quarter of this year.
  
  
• D16950 - ask for more from UART (Monday Jun. 02, 2014)
  DCD, celebrating our 15th anniversary, has released the D16950, which is an IP Core of a Uni-versal Asynchronous Receiver/Transmitter (UART), functionally compatible to the OX16C950. It allows serial transmission in two modes: UART and FIFO.
  
  
• Analog Bits Introduces Design Kits for 16nm FinFET Enabling next generation devices with SERDES, Sensors and PLLs (Monday Jun. 02, 2014)
  Analog Bits announced the release of FinFET Design Kits to enable customers with the use of mixed-signal technology on TSMC's latest 16nm process. Analog Bits' FinFET Design Kits support a variety of IP products including: SERDES, PLLs and on-chip Sensors for process, voltage and temperature for silicon devices to be manufactured at 16nm.
  
  
• New 8051 IP Core Matches Legacy Timing and Peripherals for Easy System Life Extension (Friday May. 30, 2014)
  Continuing to use the hundreds of thousands of old systems built around 8051 microcontroller chips has become easier and highly cost-effective with a flexible new 8051 IP core available from semiconductor intellectual property provider CAST, Inc.
  
  
• Arasan Chip Systems Announces Availability of ONFI 3.2 NAND Flash Controller IP & PHY Solution (Friday May. 30, 2014)
  Arasan announces today the availability of ONFI 3.2 NAND Flash Controller IP & PHY, including ONFI 3.2 compatible NV-DDR2 I/O pads, providing 533 MB/s performance.
  
  
• NetSpeed Systems Aims to Revolutionize the Design of SoCs with On-Chip Network Solution (Thursday May. 29, 2014)
  NetSpeed Systems will introduce the company with a series of presentations at the 2014 Design Automation Conference (DAC). NetSpeed has developed technology that enables SoC architects to design, configure and simulate on-chip networking solutions that are significantly smaller, faster and more power efficient in a fraction of the time normally required.