400G ultra low latency 56/112G FEC and SERDES IP sub 10ns latency
D&R Industry Expert Blogs
This section features posts from around the Web by authors with passion, integrity, authority, and community support in the IP / SoC industry.
Archives (February 2023)
China entering a "dark forest", say scientists
Mannerisms - David Manners Feb. 27, 2023 | |
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Building Sustainable 5G Network Infrastructure at Scale
arm Blogs - Panch Chandrasekaran, Director, 5G Carrier Infrastructure, Arm Feb. 27, 2023 | |
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Arm Applies Cadence Cerebrus to Optimize PPA of Next-Gen 3nm Core Implementation
Cadence Blog - Vinod Khera, Cadence Feb. 27, 2023 | |
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Ultra Wideband Radar To Drive Digital Key for Safety, Security and Beyond
Ceva's Experts blog - Navot Goren, Ceva Feb. 27, 2023 | |
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A Primer on Multi-Die Systems
Synopsys Blog - Shekhar Kapoor, Sr. Product Line Director, Synopsys Feb. 24, 2023 | |
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Rambus IP Solution Supports New NIST Lightweight Cryptography Algorithm
Rambus Blog - Rambus Team Feb. 23, 2023 | |
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Ray tracing and Fragment Shading Rate (FSR) in IMG DXT: a match made in heaven
With Imagination Blog - Trina Watt, Imagination Feb. 23, 2023 | |
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Accelerating Your Overall HW/SW Verification and Validation Productivity Using Dynamic Duo
Cadence Blog - Reela, Cadence Feb. 22, 2023 | |
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Data-Driven World Gets a Lift with First Two-Party PCIe v6.0 Linkup by Synopsys and Keysight
Synopsys Blog - Gary Ruggles, Sr. Staff Product Manager, Synopsys Solutions Group, and Brig Asay, Sr. Director of Marketing, Keysight Feb. 22, 2023 | |
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What is Spatial Audio and What Does it Have To Do With Binaural Audio?
Ceva's Experts blog - Charles Pao, Ceva Feb. 20, 2023 | |
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3 Key Automotive Technology Advances to Watch
Synopsys Blog - Ron DiGiuseppe, Automotive IP Segment Manager Feb. 16, 2023 | |
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How to Separate your Cryptographic Keys
Crypto Quantique Blog - Amit Deo, PhD, and Senior Cryptography Researcher at Crypto Quantique Feb. 14, 2023 | |
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Micro FPGAs and embedded FPGAs
Flex Logix Technologies Blog - Geoff Tate, CEO, Flex Logix Feb. 13, 2023 | |
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Semiconductor Growth from AI-Driven Design Productivity
Cadence Blog - Steve Brown, Cadence Feb. 13, 2023 | |
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A Confident ASIC Design Path through Co-Creation
Ceva's Experts blog - Mark Beal, Ceva Feb. 13, 2023 | |
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New PCIe TDISP Architecture Secures Device Interfaces with Virtual Servers
Synopsys Blog - Richard Solomon and Dana Neustadter (Synopsys) Feb. 13, 2023 | |
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Where Will AI Take Us This Year?
EETimes Blog - Stelios Diamantidis, Synopsys Feb. 10, 2023 | |
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ESD basic: Silicon Control Rectifier (SCR)
Sofics Blog Feb. 10, 2023 | |
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Make the right choices for enhanced security on RISC-V
Codasip Blog - David Marsden, Codasip Feb. 10, 2023 | |
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Charting a Productive New Course for AI in Chip Design
Synopsys Blog - Shankar Krishnamoorthy, General Manager, Synopsys EDA Group Feb. 09, 2023 | |
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Efficient inference on IMG Series4 NNAs
With Imagination Blog - Sergei Chirkunov, Imagination Feb. 06, 2023 | |
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Chiplet Summit: Challenges of Chiplet-Based Designs
Breakfast Bytes - Paul McLellan Feb. 06, 2023 | |
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Rambus DDR5 RCD Takes Performance to 6400 MT/s
Rambus Blog - Rambus Feb. 02, 2023 | |
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