This section features posts from around the Web by authors with passion,
integrity, authority, and community support in the IP / SoC industry.
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Synopsys CXL Protocol Verification Solutions Proven with Real World Vendor Devices at the CXL Compliance Test Event (CTE 002)
VIP Experts Blog
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Synopsys
Oct. 30, 2023
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USB4 Version 2.0 - Gen4 High-Speed Lane Initialization and Training
Cadence Blog
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Neelabh, Cadence
Oct. 30, 2023
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The Road Ahead
Sifive Blog
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Patrick Little, Sifive
Oct. 30, 2023
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Efficiently Packing Neural Network AI Model for the Edge
Ceva's Experts blog
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Rami Drucker, Ceva
Oct. 30, 2023
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Bringing Power Efficiency to TinyML, ML-DSP and Deep Learning Workloads
Ceva's Experts blog
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Moshe Sheier, Ceva
Oct. 30, 2023
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Rambus HBM3 Controller IP Gives AI Training a New Boost
Rambus Blog
Oct. 26, 2023
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How Will EDA Benefit from the AI Revolution?
Cadence Blog
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Vinod Khera, Cadence
Oct. 26, 2023
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Different approach to implementing multi-monitor - single scoreboard than using the macro `uvm__analysis_imp_decl
Harshal Advane
Oct. 26, 2023
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Addressing memory safety with software
Codasip Blog
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Roddy Urquhart, Codasip
Oct. 26, 2023
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Why eMMC is still a good low-budget storage option?
Truechip Blog
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Truechip Verification Team
Oct. 24, 2023
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Causes of memory unsafety
Codasip Blog
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Roddy Urquhart, Codasip
Oct. 24, 2023
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Optimizing AI models for Arm Ethos-U NPUs using the NVIDIA TAO Toolkit
arm Blogs
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Amogh Dabholkar, Arm
Oct. 23, 2023
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Utilizing CXL 2.0 IP in the Defense Sector: A Revolution in Secure Computing
PrimeSoC Technologies Blog
Oct. 23, 2023
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Buffer bound vulnerabilities and their dangers
Codasip Blog
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Roddy Urquhart, Codasip
Oct. 20, 2023
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Neural Network Model quantization on mobile
arm Blogs
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Roberto Lopez Mendez, Arm
Oct. 20, 2023
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Why You Can't Trust Your NPU Vendor's Benchmarks
Quadric Blog
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Quadric
Oct. 20, 2023
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Rambus Joins Arm Total Design
Rambus Blog
Oct. 20, 2023
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Don't Risk Failure - The Verification Process Begins During Chip Architecture
Synopsys Blog
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Dr. Johannes Stahl, Kamal Desai, Vivek Prasad (Synopsys)
Oct. 19, 2023
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Why CAN FD when you can CAN XL?
Arasan Blog
Oct. 17, 2023
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Formal verification best practices: sign-off and wrap-up
Codasip Blog
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Laurent Arditi, Codasip
Oct. 16, 2023
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Revolutionizing Electronic Circuit Testing and Debugging Using JTAG
Truechip Blog
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Truechip Verification Team
Oct. 16, 2023
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Develop Software for the Cortex-M Security Extensions Using Arm DS and Arm GNU Toolchain
arm Blogs
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Sue Wu, Arm
Oct. 16, 2023
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Concerned about your Memory Subsystem Performance? - Verify confidently with Synopsys DFI Verification IP
Synopsys Blog
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Synopsys Editorial Team
Oct. 16, 2023
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Journeying Beyond AI: Unleashing the Art of Verification
Maven Silicon Blog
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Sivakumar P R, Founder & CEO, Maven Silicon
Oct. 13, 2023
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CHES Celebrates 25 Years, Names Paper by Intrinsic ID Founders in the Top 3 Most-Cited Papers in the History of the Conference
Intrinsic ID Blog
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Pim Tuyls, founder & CEO
Oct. 12, 2023
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Elusive IPOs
Mannerisms
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David Manners
Oct. 12, 2023
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Are common memory protection mechanisms adequate?
Codasip Blog
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Roddy Urquhart, Codasip
Oct. 12, 2023
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Ensuring the Health and Reliability of Multi-Die Systems
Synopsys Blog
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Guy Cortez, Manuel Mota, Randy Fish, Yervant Zorian (Synopsys)
Oct. 12, 2023
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Formal verification best practices: checking data corruption
Codasip Blog
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Laurent Arditi, Codasip
Oct. 10, 2023
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RISC-V: An Open Standard - Backed by a Global Community - to Enable Open Computing for All
RISC-V Blog
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Calista Redmond, RISC-V
Oct. 10, 2023
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Denying China RISC-V
Mannerisms
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David Manners
Oct. 09, 2023
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Arm A-Profile Architecture Developments 2023
arm Blogs
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Martin Weidmann, Arm
Oct. 09, 2023
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How Collaboration Will Accelerate Adoption of Multi-Die Systems
Synopsys Blog
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Synopsys Editorial Team
Oct. 05, 2023
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Synopsys AMBA Verification IP (VIP) Supports Latest AXI-K Specification from Arm
VIP Experts Blog
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Synopsys
Oct. 05, 2023
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Unsafe memory access is ruinous
Codasip Blog
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Roddy Urquhart, Codasip
Oct. 05, 2023
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Formal verification best practices: towards end-to-end properties
Codasip Blog
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Laurent Arditi, Codasip
Oct. 03, 2023
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Cadence Generative AI Solution: A Comprehensive Suite for Chip-to-System Design
Cadence Blog
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Steve Brown, Cadence
Oct. 03, 2023
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Driving Connectivity and Communication Exploring the Synergy of CAN XL and Ethernet IP in Automotive Applications
Arasan Blog
Oct. 03, 2023
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Ensuring IP Quality for a Better IP Experience
CAST Blog
Oct. 02, 2023
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Alif Is Creating SoC Solutions for Machine Learning with Cadence and Arm
Cadence Blog
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Tanushri Shah, Cadence
Oct. 02, 2023
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Cadence Targets Automotive Market Demands with UCIe
Cadence Blog
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SFUNG, Cadence
Oct. 02, 2023
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