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Vivante Adopts Carbon Design Systems' System-Level Modeling, IP Deployment Tools (Tuesday May. 04, 2010)
Corporation, an embedded graphics technology leader, and Carbon Design Systems™ today signed a strategic, multi-year agreement where Carbon Model Studio™ will be used to generate and deploy accurate models of Vivante's Graphics Processing Unit (GPU) cores.
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DOLPHIN Integration promotes equivalence checking for multi-level modeling (Friday Apr. 30, 2010)
In addition to its capabilities to simulate mixed-signal and multi-language designs, SMASH allows performing template-based equivalence checking between models at different levels of abstraction, or with respect to a specification or a given standard.
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Cadence Issues Blueprint to Battle "Profitability Gap"; Counters Semiconductor Industry's Greatest Threat (Wednesday Apr. 28, 2010)
Cadence Design Systems today laid out a new vision for the semiconductor industry, EDA360. In outlining an application-driven approach to system design and development, Cadence issued a challenge to the semiconductor and electronic design automation (EDA) communities to address the growing “profitability gap” that threatens the vitality of the electronics industry.
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Cadence Debuts Verification Computing Platform, Accelerating Time and Improving Quality of System Development (Monday Apr. 26, 2010)
Cadence Design today announced the first fully integrated high-performance verification computing platform, called Palladium XP, that unifies simulation, acceleration and emulation into a single verification environment.
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Dolphin Integration will enable you to save development time for your application program (Friday Apr. 23, 2010)
The latest real-time debugging solution from Dolphin Integration now applies the technique of Property Checkers to locate program bugs. It drastically speeds-up the iterative debug-correction process.
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Qualcomm Adopts GateRocket Solution to Address FPGA Complexity Challenges (Tuesday Apr. 20, 2010)
GateRocket today announced that Qualcomm has adopted its RocketDrive® and RocketVision® products to address the increasing complexity of the FPGAs and ASICs its engineering teams are developing.
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Nangate Announces the Footprint Compatible IPO Module for Power Reduction and Faster Timing Closure in Physical Design (Tuesday Apr. 20, 2010)
Nangate today announced the release of the Footprint Compatible module, a solution enabling power reduction and faster timing closure when used with Nangate Design Optimizer™ and MegaLibrary™. The Footprint Compatible module solution will enhance existing standard cell libraries in conjunction with Nangate Library Creator™.
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Aldec Adds RMM Library and FPGA Primitive Support to ALINT (Monday Apr. 19, 2010)
Aldec announces today its latest Design Rule Checking application, ALINT™ 2010.02. The release adds support for Reuse Methodology Manual (RMM) design rules
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GN ReSound Develops Wireless Protocol Stack for Next-Generation Hearing Instruments, using Target's Optimizing C Compiler Technology (Friday Apr. 16, 2010)
Target Compiler Technologies today announced that the wireless protocol stack of Range, GN ReSound’s new hearing instrument platform, was entirely developed using Target’s optimizing C compiler technology.
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Mentor Graphics Veloce Emulation Platform Adopted by STMicroelectronics to Accelerate Time-to-Market for its New Generation Set-Top-Box Chip Sets (Thursday Apr. 15, 2010)
Mentor Graphics today announced that STMicroelectronics' Home Entertainment and Display group (HED), a leader in the provision of digital consumer applications, has adopted the Veloce® platform for the system-level validation of its next-generation of digital Systems-on-Chip (SoC) for High-Definition (HD) Set-Top-Box (STB) applications.
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Mentor Graphics Extends DO-254 Platform Offering with Enhanced HDL Coding Standards (Tuesday Apr. 13, 2010)
Mentor Graphics today announced the availability of the HDL Designer™ tool’s enhanced set of HDL coding checks for DO-254 compliance.
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Sonics Network for AMBA Protocol Now Available for Windows (Tuesday Apr. 06, 2010)
Sonics today announced a Windows version of SNAP™ (Sonics Network for AMBA® Protocol) - making the product accessible to a greater number of SoC designers and developers.
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TSMC Delivers Interoperable EDA Formats for Advanced Process Technologies (Tuesday Apr. 06, 2010)
TSMC has made available several unified and interoperable EDA technology files for its 65 nanometer (nm), 40nm and 28nm process nodes. The design technology file suite includes interoperable process design kit (iPDK), interoperable design rule check (iDRC), layout-versus-schematic (iLVS), and interoperable interconnect extraction (iRCX).
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SiliconBlue Selects Synopsys as FPGA Synthesis Partner for Its iCE65 mobileFPGA Family (Wednesday Mar. 31, 2010)
Synopsys and SiliconBlue today announced that SiliconBlue has chosen Synopsys Synplify Pro® FPGA synthesis software as the synthesis tool of choice for its iCE65™ family of mobileFPGA™ devices. SiliconBlue will distribute with its iCEcube™ software a version of the Synplify Pro software optimized for iCE65 devices.
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Design Compiler 2010 Doubles Productivity of Synthesis and Place and Route (Monday Mar. 29, 2010)
Synopsys today introduced Design Compiler® 2010, the latest RTL synthesis innovation within the Galaxy™ Implementation platform, which delivers a twofold speedup in the synthesis and physical implementation flow.
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Bluespec High-Level Synthesis Toolset is Selected by Panasonic (Thursday Mar. 25, 2010)
Bluespec announced today that the Bluespec® high-level synthesis toolset for the development of system-on-a-chip (SoC) designs has been selected by Panasonic Corporation’s Strategic Semiconductor Development Center.
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The MathWorks and Mentor Graphics Outline Joint DO-254 Workflow for Model-Based Design (Tuesday Mar. 23, 2010)
The MathWorks and Mentor Graphics today announced a joint collaboration to provide guidance on an integrated workflow for DO-254 compliance using Model-Based Design.
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Mentor Graphics to Extend Cooperation with STMicroelectronics for Advanced Chip-Development Design Solutions (Tuesday Mar. 16, 2010)
Mentor Graphics and STMicroelectronics today announced a broad-scoped collaboration to develop advanced design solutions at the 32-nm technology node and down to 20-nm node.
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SpringSoft Unveils Unique Automated Custom Digital IC Place and Route Tools (Monday Mar. 15, 2010)
SpringSoft today introduced two new products aimed at addressing the increasing challenge of designing custom chips that contain both analog and digital circuitry.
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Forte Design Systems Ships Latest Version of CellMath Designer (Friday Mar. 05, 2010)
Forte Design Systems announced it is shipping the latest version of CellMath Designer™ datapath synthesis and Cellmath IP software. The CellMath family allows register transfer level (RTL) designers to reduce area, improve performance and lower power consumption for their existing datapath-intensive design blocks.
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Nangate announces 45nm Open Cell MegaLibrary and easy access to Nangate Design Optimizer evaluation (Thursday Mar. 04, 2010)
Nangate today announced that it has released the 45nm Open Cell MegaLibrary™ to support the existing 45nm Open Cell Library. MegaLibrary is a new type of standard-cell library containing a very large set of fine-grained cell variants that enable the digital logic of an IP core or SoC design to operate with significantly higher performance than with the traditional standard-cell library approach.
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Synopsys System Studio Speeds DSP Algorithm Development With New Matrix Data-Type Support (Wednesday Mar. 03, 2010)
Synopsys today announced important new capabilities in its System Studio C/C++ model-based analysis and simulation environment. System Studio now offers matrix and vector data-type support.
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DOLPHIN Integration introduces EMBLEM-MATH: a library of mathematical equations to build complex behavioral models (Monday Mar. 01, 2010)
In 2010, Dolphin Integration puts the emphasis on launching a range of libraries of engineering models (EM) to ease the design of logic, analog and mixed signal circuit and multi domain system models
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CoWare Unveils Next-Generation, System-Centric Analysis for CoWare Platform Architect and CoWare Virtual Platform (Monday Mar. 01, 2010)
CoWare today unveiled exciting new system-centric analysis in the 2010.1 release of CoWare Platform Architect and CoWare Virtual Platform. The non-intrusive data collection, powerful Eclipse-based visualization and meaningful system metrics deliver significant productivity improvements for individual developers including architects, systems designers and software developers and improve collaboration across disciplines and companies.
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Magillem introduces Rev.Enge, the first platform tackling the obsolescence issue in the electronic CAD flow (Friday Feb. 26, 2010)
Capitalizing from its strong experience in the methodology used to assemble designs by using metadata description of intellectual property blocks and components, Magillem is introducing a new line of products targeted towards systems integrators. Rev.Enge captures and traces all the information on your designs. A true mapping of a complex system specified in a descriptive meta model, with all the relationships, dependencies, attributes, parameters, files location, but independent from the various tools and data formats used for the design, will preserve the life term of the system beyond the one of its parts.
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MDA Adds Significant Flexibility to its Unique Analog Design Platform M-Design (Wednesday Feb. 24, 2010)
Mephisto Design Automation today announced the availability of its M-DESIGN™ 3.2 release. M-DESIGN offers analog and mixed-signal designers immediate productivity gains for their front-end design tasks. Moreover, the platform facilitates setting up and executing complex simulations, verifications and optimization, even across different abstraction levels.
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Duolog Tools Auto-generate OVM Verification Environment (Tuesday Feb. 23, 2010)
Duolog Technologies today announced that its award-winning Socrates chip integration platform can now auto-generate a complete OVM verification environment, using version 1.0 of the OVM register package recently released by Mentor Graphics.
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CoWare SPW Boosts Signal Processing Prototyping for Advanced Wireless Systems (Monday Feb. 22, 2010)
CoWare is rolling out a new release of its CoWare SPW products. The new SPW 2010.1 release advances the LTE Wireless Reference Library and adds a complete Xilinx ®implementation flow that includes direct source translation technology from C Data Flow (CDF) into RTL.
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Reference Virtual Platform of ARM Model Running Linux Under SystemC/TLM-2.0 Released by Open Virtual Platforms (OVP) (Monday Feb. 22, 2010)
Reference Virtual Platform of ARM Model Running Linux Under SystemC/TLM-2.0 Released by Open Virtual Platforms (OVP)
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SpringSoft Releases Industry's Most Robust OA-Compliant Custom IC Solution (Monday Feb. 22, 2010)
SpringSoft today announced the availability of its latest version of the Laker™ Custom Layout Automation System, which offers the industry’s most complete and robust support of the OpenAccess (OA) database standard.