IP / SOC Products News
-
Evatronix upgrades its SDIO Host Controller with the full support for CPRM, MMC 4.2, and SDIO specification rev. 2.0. (Monday Nov. 03, 2008)
Support for MMC 4.2 guarantees the IP core’s compatibility with the newest MMC-Plus memory cards, and thus increases the maximum data transfer rates to 400 Mbit/s.
-
Digital Blocks Announces the TFT LCD Controller Reference Design for Altera FPGA Development Kits based on the DB9000AVLN LCD Controller IP Core (Friday Oct. 31, 2008)
Digital Blocks today announces the TFT LCD Controller Reference Design centered on Digital Blocks DB9000AVLN TFT LCD Controller IP Core and Altera’s FPGA Development Kits.
-
Arasan Chip Systems Builds On Strategic Mobile Initiative With MIPI CSI-2 IP Solution Release (Friday Oct. 31, 2008)
Arasan Chip Systems today announced the first fully compliant Mobile Industry Processor Interface (MIPI) Camera Serial Interface (CSI) IP commercially available on the market.
-
Synopsys Announces Availability of DesignWare SATA PHY IP in SMIC 130-nm Process Technology (Thursday Oct. 30, 2008)
Synopsys today announced the immediate availability of the silicon-proven DesignWare® SATA PHY IP for SMIC's popular 130 nanometer (nm) process technology.
-
Evatronix introduces a Hi-Speed USB Embedded Hub Controller (Wednesday Oct. 29, 2008)
USBHS-HUB, due to its USB Specification Rev. 2.0 compliance, supports all USB transfer speeds - High, Full and Low. For seamless communication between the USB host and devices operating at different data transmission rates the hub implements an integrated Transaction Translator which takes care of proper interpretation of high speed signaling for components operating at full and low speeds.
-
MoSys 1T-SRAM Embedded Memory Technology Meets TSMC 90 Nanometer eDRAM Process Standards (Tuesday Oct. 28, 2008)
MoSys today announced it has achieved Level III and IV verification of its 1T-SRAM embedded memory technology on TSMC's 90 nanometer (nm) General Purpose eDRAM process by the foundry's IP Alliance program.
-
Xilinx and EB Drive OBSAI Standard Adoption for Wireless Infrastructure (Thursday Oct. 23, 2008)
Joint interoperability testing of Xilinx LogiCORE IP for OBSAI RP3-01 completed with EB Base Station Interface Tester to enable faster, lower cost development of wireless base stations
-
Arteris Delivers Major Productivity Features for Its Network-on-Chip Interconnect IP and Toolset (Wednesday Oct. 22, 2008)
NoC Pioneer's Seventh Major Production Release Includes Advanced Memory Traffic Support, System Verilog-based Verification Tool and Multi-Voltage Support
-
IPextreme Delivers Free ColdFire Processor for Altera Cyclone III FPGA (Tuesday Oct. 21, 2008)
IPextreme today announced immediate availability of the V1 ColdFire® IP core optimized for Altera Cyclone III devices. The V1 ColdFire FPGA CIII Processor core can be downloaded free of charge.
-
Fresco Logic Demonstrates Industry's First SuperSpeed USB Extensible Host Controller Interface (xHCI) (Tuesday Oct. 21, 2008)
Fresco Logic will demonstrate a SuperSpeed USB (USB 3.0) xHCI host solution on its hardware development platform in the USB 3.0 Promoter Group booth at the Intel Developer Forum (IDF) in Taiwan.
-
Evatronix Application-debugging Support Environment for 8051 and 68000 compliant IP cores improved with trace and TCP/IP support (Tuesday Oct. 14, 2008)
The newest release of the EASE enhances its predecessor functionality by two new features: the configurable real-time trace and the TCP/IP support, hence providing customers with better, faster and more convenient interface between the hardware prototype and the embedded software development environment.
-
Alma Technologies to integrate Scalado SpeedTags technology in its JPEG products (Monday Oct. 13, 2008)
Scalado and Alma Technologies have today announced details of the first JPEG compression IP core supporting Scalado SpeedTags™ technology.
-
Imagination Technologies extends successful POWERVR SGX53x family (Tuesday Oct. 07, 2008)
POWERVR SGX531 takes the already industry-leading capabilities of POWERVR SGX IP cores to another new level with an upgraded 128-bit internal bus architecture and related enhancements to maximise performance when integrated in the latest SoCs.
-
Arm Introduces LPDDR2 Memory Controller to Accelerate Chip Performance and Improve Energy Savings (Tuesday Oct. 07, 2008)
ARM today announced the ARM® PrimeCell® low-power DDR2 (LPDDR2) dynamic memory controller (PL342), which provides a high-performance interface to LPDDR2 memory systems that provide more than twice the bandwidth of LPDDR memory systems and deliver significant power savings over standard DDR2 memory.
-
videantis announces full HD 1080p video codec IP solution for mobile and consumer devices (Monday Oct. 06, 2008)
By combining a powerful, programmable high definition stream unit with multiple video engines, the v-MP4180HDX solution is capable of encoding and decoding video up to full HD 1080p resolution in a wide range of standards on extremely small silicon area with less than 1MHz load on the host CPU.
-
Arasan Chip Systems Drives Strategic Mobile Initiative with Release of MIPI DSI IP Solution (Thursday Oct. 02, 2008)
Arasan today announced the first Mobile Industry Processor Interface (MIPITM) Display Serial Interface (DSI) IP commercially available on the market.
-
Coresonic reveals demonstration platform that delivers world's smallest and most efficient WiMAX solution (Wednesday Oct. 01, 2008)
Coresonic will demonstrate the company's LeoCore WiMAX personality pack running on a new FPGA-based evaluation system to show how it is possible to add a complete mobile WiMAX solution to any device with very little additional silicon.
-
Sarnoff Europe Releases Silicon-proven ESD Solutions for Advanced Applications in 40nm CMOS (Monday Sep. 29, 2008)
Targeted and suitable for the specific design challenges of advanced consumer applications in 40nm, the silicon-proven ESD solutions feature extremely low power consumption (50pA leakage), enable high signal speeds (100fF linear ESD load) and provide high ESD performance for external pins (8kV HDMI).
-
MIPS Technologies Expands HDMI Portfolio with Industry’s First 45nm IP Cores; 90nm IP in Silicon (Monday Sep. 29, 2008)
MIPS today announced an expansion of its HDMI IP portfolio, with the industry's first 45nm IP cores (Controller + PHY), as well as 90nm IP cores in silicon.
-
A New Offering of High-Resolution Audio DACs for Resident Consumer Applications by Dolphin Integration (Monday Sep. 29, 2008)
loDAC audio converters are proposed with different Signal to Noise Ratios (SNR) to cover a wide range of applications: from the entry level Set-Top-Box, and now up to the high-end DVD player needing 5.1 channel processing with a SNR up to 110 dB.
-
New HiveGo CSS Product Line From Silicon Hive and Acutelogic Provides Complete Embedded Camera Imaging Subsystems for SoC Makers (Tuesday Sep. 23, 2008)
Silicon Hive and Acutelogic Enter Into Partnership Enabling SoC Makers To Buy One Stop Camera Imaging Solutions Which Combine Silicon Hive’s Efficient Programmable Processors With Acutelogic’s Ultra-High Quality And Robust Image Processing and Camera Control Algorithms.
-
IQ Analog announces industry first 8-Channel Analog Front End IC (Tuesday Sep. 16, 2008)
After three years of development, IQ Analog announces the arrival of the IQA-F430 Octal Analog Front End (AFE), ushering in the next generation mixed signal front end platform for wireless and communication applications.
-
On2 Technologies Announces New High Definition Hardware Encoder IP (Monday Sep. 15, 2008)
The Hantro 7280 enables real-time video encoding up to 1280 x 1024 resolution for low-power chipsets
-
eMemory and MagnaChip Partner to Offer Non-Volatile Memory Logic and High Voltage Processes (Wednesday Sep. 10, 2008)
eMemory and MagnaChip today announced that the Neobit-embedded non-volatile memory (NVM) intellectual property has received final verification to be applied in CMOS logic and high-voltage processes.
-
High Performance DDR3 SDRAM Controller from Eureka Technology Supports AHB and AXI Bus Interface. (Monday Sep. 08, 2008)
Eureka’s DDR3 SDRAM controller is designed specifically to harness the performance advantage of the DDR3 SDRAM. It employs high speed design techniques such as fast page access, pipeline design and smart arbitration. The controller supports both DDR2 and DDR3 SDRAMs to enable a smooth transition between the two SDRAM technologies.
-
intoPIX Introduces its New Range of JPEG 2000 Mathematically Lossless IP-Cores (Monday Sep. 08, 2008)
The M-Lossless family is able to process 10, 12 and up to 16 color bit depth, HD 1080 resolutions up to 60p and DCI 2K and 4K compliant formats in real-time, keeping bit-to-bit reversibility.
-
Verayo Launches, Introduces Security Solutions Based on "Unclonable" Silicon Chips (Thursday Sep. 04, 2008)
The core technology that makes these silicon chips unclonable is called Physical Unclonable Functions (PUF). PUF is like a biometrics technology for silicon chips. It extracts a type of “electronic DNA or fingerprint” that is unique to each silicon chip, and uses it for authentication and security applications.
-
GDA Technologies Adds AXI to Its Serial RIO Silicon IP (Wednesday Sep. 03, 2008)
AXI Bridge was added to GDA's GRIO Serial RIO IP and to enhance designs demanding high performance, low latency, low pin count, reliability and scalability.
-
Anchor Bay Offers New Low-Cost HDMI 1.3 Deep Color Video-Processing IC for Blu-ray Players and AV Receivers (Wednesday Sep. 03, 2008)
The ABT1030 fully supports HDMI 1.3 with Deep Color™ (36-bit inputs and outputs) and xvYCC colorimetry capabilities, featuring 12-bit input and output resolutions. Video signals from 480i up to full 1080P HDTV is completely supported as well when using the ABT1030's pass-through mode.
-
IPextreme Announces Availability of Market's First IEEE 1149.7 cJTAG Semiconductor IP Core (Tuesday Sep. 02, 2008)
Texas Instruments, a key contributor to the development of the IEEE 1149.7 standard, collaborates with IPextreme to bring compact JTAG (cJTAG) IP to market