IP / SOC Products News
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Onyx Announces RF and Power Management IP Blocks in Jazz Semiconductor RFCMOS Process (Tuesday Jul. 19, 2005)
The OY5100 and OY6100 IP blocks have been taped-out in the Jazz CA18HR RFCMOS process and engineering samples will be available in the fourth quarter
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Eureka Technology Successfully Validated and Demonstrated PCI Express Controller IP Core (Friday Jul. 15, 2005)
Eureka’s PCI Express Controller Core is designed for both ASIC and FPGA implementations. The Controller Core includes the Transaction Layer, Data Link Layer and Physical Layer of the PCI Express Specification. It conforms to the latest 1.0a revision and i
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ARM Demonstrates Highest Performance ARM11 Family Processor (Wednesday Jul. 13, 2005)
ARM has recently demonstrated the first test chip of its ARM11™ MPCore™ synthesizable processor which has demonstrated performance equivalent to a 1.2GHz ARM11 family processor, with power consumption of approximately 600mW while delivering 1440 DMIPS of
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Arasan Releases SDIO Spec Ver 1.20 Compliant SDIO Device IP (Wednesday Jul. 13, 2005)
The new IP supports 50 MHz giving it a maximum throughput of 200Mbps in SD-4 bit mode. It also supports extended voltage range of 1.8V which makes it suitable for Cellular/Smart phone applications
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CHIPIDEA Announces Silicon Validation of a Very Compact 90nm 10-bit /105MHz ADC (Tuesday Jul. 12, 2005)
CHIPIDEA, listed by Gartner Inc. as the world leading Analog and Mixed-Signal IP player, announces silicon validation of the CI3514hm, a very compact 90nm 10-bit/105MHz ADC, with very low power dissipation and power-down modes for standby operation
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RF Engines releases a library of high performance FFT Cores for FPGA (Monday Jul. 11, 2005)
RF Engines' library provides FPGA designers with a source of highly optimised high-speed FFT cores that can be quickly and cost-effectively integrated into a design.
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TELEVISION IP: Programmable core boosts processing On Demand (Monday Jul. 11, 2005)
Intellectual-property licensing company On Demand Microelectronics GmbH is quietly making inroads into the digital TV market by leveraging the programmability of its synthesizable core
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Rambus Unveils Next Generation XDR Memory Interface (Thursday Jul. 07, 2005)
8GHz XDR2 DRAM with micro-threading enables unprecedented graphics capabilities
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CHIPIDEA announces a new HDTV AFE product line (Wednesday Jul. 06, 2005)
These new state-of-the-art IP cores handle most HDTV modes and also PC-Graphics applications
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Rambus PCI Express PHY IP on Fujitsu 90nm CMOS Process (Tuesday Jul. 05, 2005)
Compliance and interoperability tested, silicon proven PHYs extend to multiple applications
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Imagination Technologies' PowerVR MBX Supports Windows Mobile 5.0 (Tuesday Jun. 28, 2005)
Leading Graphics and Video IP Technology is Enabling Leap Forward in Mobile Entertainment
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MorethanIP releases new 10 Gigabit Ethernet Base-X PCS Core for XGXS/XAUI implementations. (Monday Jun. 27, 2005)
MorethanIP releases new 10 Gigabit Ethernet Base-X PCS Core for XGXS/XAUI implementations.
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ASICS.ws achieves USB 2.0 HS-OTG Certification (Monday Jun. 27, 2005)
ASICS World Services, Ltd. is proud to announce that it is one of the first companies in the world to achieve USB 2.0 HS-OTG Compliance Certification
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Faraday Expands Into High-performance Application ICs with its Hard Core CPU Technology (Monday Jun. 27, 2005)
FA5 and FA6 CPU Cores Enable the Next Generation SoC Solutions at UMC 0.18µm and 0.13µm CMOS Technologies
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CEVA Brings a High Performance, Low-Power Audio Platform to Consumer Devices (Monday Jun. 27, 2005)
CEVA-Audio™ - an Integrated Hardware and Software DSP-based Solution - Delivers a Low-Power, Low-Cost Platform with Easy Design Integration
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Denali and TaraCom Announce Comprehensive Solutions for 3.0 Gb/s SATA (Thursday Jun. 23, 2005)
IP Vendors Team to Deliver Digital Controller IP, PHY IP, and Verification IP
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All-silicon Copernicus Clock generates 528MHz clock signal with no external components (Thursday Jun. 23, 2005)
CMOS clock generator creates a stable high frequency clock signal with minimal power dissipation, remains operational over an extreme temperature range, and does not require external components.
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Silicon Hive announces two new Avispa processors (Wednesday Jun. 22, 2005)
Silicon Hive has announced two new cores in the award-winning Avispa family.
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POWER MANAGEMENT: Converters move on-chip to regulate SoC's voltage (Monday Jun. 20, 2005)
While most of the attention in system-on-chip design remains focused on digital issues-IP selection, interconnect architecture, memory generation and the like-yet another kind of integration problem is quietly creeping up on designers, especially in compa
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Impinj and TSMC Qualify AEON Memory (Monday Jun. 20, 2005)
World’s First Multiple Time Programmable Non-volatile Memory and E² Replacement Now Available in Cost-Effective, Standard Logic CMOS Process; Adopted by Leading Chip Companies
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Jennic validates its Serial RapidIO intellectual property in silicon (Monday Jun. 20, 2005)
Jennic has successfully demonstrated its Serial RapidIO IP operating in conjunction with solutions from other RapidIO vendors
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Photron Technologies and AccelChip Implement Unique Digital Filter Design into FPGAs for Breakthrough Wireless Communications Technology (Thursday Jun. 16, 2005)
Next Generation Ultra Spectral Modulation Technique Achieves 25x Increase in Wireless Bandwidth
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ARM Artisan Silicon-Verified Serial Link 200 PHY Series Available On Leading 90-Nanometer Processes (Wednesday Jun. 15, 2005)
ARM Artisan Silicon-Verified Serial Link 200 PHY Series Available On Leading 90-Nanometer Processes
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MoSys Delivers 0.13 Micron 1T-SRAM Memory Compiler (Monday Jun. 13, 2005)
Web-based Tool Compatible with TSMC, Chartered, SMIC and UMC Processes
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MoSys Unveils Its 1T-SRAM ''CLASSIC Macro'' Family (Monday Jun. 13, 2005)
Available on TSMC, Chartered, and SMIC 0.13micron Processes
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CAST Announces PCI Express Endpoint Controller Core (Monday Jun. 13, 2005)
CAST, Inc. today announced a new IP core that implements an endpoint controller for PCI Express (PCIe), a fast new serial data interconnect intended for advanced and future applications
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LTRIM Converters Aim to Reduce Battery Use - High-efficiency Buck/Dual-mode IP Blocks Announced (Monday Jun. 13, 2005)
Recognizing rising market demand for low power consumption in portable devices, LTRIM today announced two new DC-DC converter IP blocks for buck, or buck/boost chip designs
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New LTRIM Boost Converters Boast High-Efficiency - Analog IP blocks target Single and Dual battery-powered products (Monday Jun. 13, 2005)
Taking aim at market demands for longer battery life in portable devices, LTRIM today announced a pair of high-efficiency step-up (boost) DC-DC converter IP blocks
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Spiral Gateway preps C-programmable low-power fabric (Friday Jun. 10, 2005)
Spiral Gateway Ltd., a startup company that was spun out of the University of Edinburgh in 2004, is preparing to launch a hardware fabric design approach that the company claims can be programmed directly using the ANSI-standard version of the C software
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Avery Design and ASIC Architect Team to Deliver PCI Express IP Solution (Friday Jun. 10, 2005)
Avery Design Systems and ASIC Architect today announced a cooperative effort to deliver a comprehensive PCI Express design and verification IP solution