IP / SOC Products News
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German company to introduce PLL IP core at DAC (Friday Jun. 10, 2005)
Cologne Chip plans to introduce a new intellectual property core design at the 2005 Design Automation Conference.
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Synopsys and IBM Announce Availability of Fully Synthesizable PowerPC Cores and SystemC Models (Wednesday Jun. 08, 2005)
Synopsys to Deliver Complete System to Implementation Solution for Power Architecture Designs
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Unique Fractional Resampling Cores from RF Engines (Tuesday Jun. 07, 2005)
RF Engines Ltd (RFEL), the specialists in innovative signal processing design, has developed a new range of Fractional Resampling Architectures for FPGA that can be used to perform up-sampling or down-sampling of high-speed digital signals
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Denali Software and GDA Technologies Team to Deliver Comprehensive Intellectual Property Solutions for Advanced Switching Interconnect Systems (Tuesday Jun. 07, 2005)
Design and Verification IP Products Speed Deployment of Advanced Switching Designs
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Synopsys Announces DesignWare IP Support for PCI Express 1.1 Specification (Monday Jun. 06, 2005)
DesignWare Digital Controller Cores and PHY IP Available Today for the PCI Express 1.1 Standard
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Silicon Hive, a semiconductor IP supplier in the Philips Technology Incubator, Demonstrates World's First Fully Programmable Digital TV Demodulator IP Core (Monday Jun. 06, 2005)
Silicon Hive IP Cores enabled the SoC to be produced in less than one year
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ARM Artisan Low Power IP Offered By IBM, Chartered To Support 65-Nanometer Common Platform (Monday Jun. 06, 2005)
Industry’s first third-party low-power IP available for a foundry 65nm process
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Xilinx Announces Immediate Availability of Industry's First 4 Gbps Programmable Fibre Channel Solution (Monday Jun. 06, 2005)
4G Fibre Channel Core Designed for Virtex-4 FPGAs Enables SAN Fabrics to Match Ever Increasing Server and Disk Speeds
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Rambus PCI Express PHY Passes Standard Compliance Testing; Silicon-Proven IP Achieves Five Entries on PCI-SIG Integrators List (Thursday Jun. 02, 2005)
Silicon-Proven IP Achieves Five Entries on PCI-SIG Integrators List
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AccelChip Facilitates Sensor Array Processing with New SVD Matrix Factorization DSP IP Core (Wednesday Jun. 01, 2005)
This new core generator makes the process of implementing sensor array processing algorithms containing SVD matrix inversion and factorization into FPGAs and ASICs much easier and will dramatically reduce development times
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HiTech Global Distribution announces Availability of the world's fastest 8051 Microcontroller IP Core with JTAG on-chip debug interface (Wednesday Jun. 01, 2005)
Designed by Digital Core Design, and proven in multiple ASIC and FPGA designs, the DP8051 is an 8-bit ultra high performance, speed optimized controller with JTAG on-chip debug interface supporting unlimited number of real time hardware breakpoints.
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Actel Broadens Popular PCI Product Family With CorePCIF (Wednesday Jun. 01, 2005)
Versatile Core Offers a Host of Customer-Defined Features Including Improved Application Interface
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LTRIM Unveils The LTR1803 LDO - A Programmable Output Voltage Regulator (Thursday May. 26, 2005)
The IP, which is based on TSMC 0.25um CMOS process technology, provides designers with the utmost in flexibility as it enables them to adjust the voltage levels to 50mV increments of their initial target design
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Mentor Graphics First Vendor to Achieve PCI Express Intellectual Property Compliance on NitAl Platform (Thursday May. 26, 2005)
This compliance enables designers to rapidly develop high-performance computing, storage and communications systems that support the PCI Express standard.
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Elliptic Semiconductor launches Digital Rights Management Security Products (Tuesday May. 24, 2005)
Working closely with MIPS Technologies, Inc. and system-on-a-chip (SoC) designers of digital consumer devices, Elliptic has developed a complete portfolio of products that supports Microsoft Windows DRM, IPTV and the Open Mobile Alliance (OMA) 2.0 DRM sta
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Sundance Unveils One Giga Sample per Second Digital Down Converter (Tuesday May. 24, 2005)
Specifically developed for Xilinx' FPGAs, this fully configurable core combines flexibility and speed to address the demanding performance requirements of complex DSP applications such as SDR-Software Defined Radio, Wireless IP development, hardware testi
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Initial Wave of Intellectual Property Support for New LatticeXP FPGA Family now Available (Monday May. 23, 2005)
ispLeverCORE IP Modules, Including Ethernet, PCI, DMA, FCRAM and DDR can be Downloaded and Evaluated without Charge
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ChipMaestro from eInfochips Extends SoC Design and Verification Expertise to Computer Peripherals and Communications markets (Monday May. 23, 2005)
New service leverages 500+ man-years of expertise in designing and verifying complex chips
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Denali Announces Dataplex IP Product for DDR, Flash, and SATA Subsystems (Monday May. 23, 2005)
Integrated Data-Subsystem IP Leverages Databahn Technology, Addresses Quality, Performance, and Speed of Deployment
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Small, robust flash cell claims easy process integration (Monday May. 23, 2005)
The addition of nonvolatile memory to a system-level IC is never an easy proposition. Often, design teams take the easy way out and simply put flash in an external chip
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Xilinx Strengthens DSP IP Library with New Floating-Point and Digital Video Broadcasting S2 Cores (Thursday May. 19, 2005)
New Floating Point Core enables Adaptive beam forming antenna system and Radar Signal Processing
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Denali Announces Design IP, Verification IP Products for Serial ATA Standard (Wednesday May. 18, 2005)
Databahn Design Cores, PureSpec Verification IP Speed time-to-market, Reduce Risk for SATA Designs
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Kaben Develops Synthesizer IP for WiMAX in IBM7WL (Wednesday May. 18, 2005)
Kaben Research Inc., a leading developer of mixed-signal, Intellectual Property (IP) blocks for Wireless, System-on-a-Chip (SoC) manufacturers, announced today that it has developed a synthesizer IP block for WiMAX applications in the IBM7WL process
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Elixent launches next generation Reconfigurable Algorithm Processor technology (Tuesday May. 17, 2005)
The D-Fabrix v2.0 architecture allows designers to implement signal processing algorithms in half the silicon area required by previous reconfigurable systems, and with substantially reduced power consumption
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CEVA Unveils a New Addition to the Powerful CEVA-X DSP Family (Monday May. 16, 2005)
The CEVA-X1621(TM) Combines the High Performance Level of the CEVA-X1620(TM) DSP Core with an Advanced Cache Memory Subsystem
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MIPS Technologies Introduces the MIPS32 24KE Core Family - the First DSP ASE Enabled MIPS Cores (Monday May. 16, 2005)
Highest Performing Licensable Synthesizable Cores Provide Efficient DSP Architecture with Significant Overall Reduction in Die Area and Cost
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New Xilinx MicroBlaze Soft Processor Increases Clock Frequency By 25% (Monday May. 16, 2005)
MicroBlaze 4.00 features tightly-coupled Floating Point Unit option
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ARM Announces Class-Leading BDTI DSP Scores For The ARM1136J-S Processor (Monday May. 16, 2005)
BDTI Benchmark results confirm that the ARM1136J-S processor achieves 25 percent better performance than the competition
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Tensilica Xtensa LX Processor Beats All Other Processors and Cores On EEMBC Networking 2.0 and Office Automation Benchmarks (Monday May. 16, 2005)
Xtensa LX Nearly 4X Faster than Next Closest Competitor
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Mobius Microsystems Introduces the All-silicon Copernicus Clock (Tuesday May. 10, 2005)
Fully-integrated high-performance clock generator achieves highest total frequency accuracy for all-silicon clocks