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IP / SOC Products News

• eSilicon Tapes Out 7nm Combo PHY (HBM2/HBM2E/Low Latency) Test Chip (Thursday May. 09, 2019)
  eSilicon announced today the tapeout of a 7nm test chip to provide silicon validation of its physical interface (PHY) to support the new JEDEC standard JESD235B, referred to informally as high bandwidth memory (HBM) 2E and emerging low-latency HBM technology.
  
  
• eSilicon Tapes Out 7nm neuASIC IP Platform Test Chip (Tuesday May. 07, 2019)
  eSilicon announced today the tapeout of a 7nm test chip to validate the latest neuASIC™ IP platform release. eSilicon’s neuASIC IP platform provides a library of IP that supports a wide range of functions found in artificial intelligence applications.
  
  
• eSilicon Tapes Out 7nm 400G Gearbox/Retimer Test ASIC (Wednesday May. 01, 2019)
  The test ASIC includes four lanes of eSilicon’s long-reach 112 Gbps SerDes and eight lanes of its long-reach 56 Gbps SerDes. The eSilicon SerDes IP is integrated with media access control (MAC), forward error correction (FEC) and gearbox IP from Precise-ITC.
  
  
• Moortec Provide Embedded Monitoring Solutions for Arm's Neoverse N1 System Development Platform on TSMC 7nm Process Technology (Wednesday May. 01, 2019)
  Moortec today announced the delivery of its In-Chip Monitoring solution on TSMC 7nm FinFET process to the new Arm® Neoverse™ N1 System Development Platform (SDP).
  
  
• Synopsys Launches New VESA DSC IP for Visually Lossless Compression in Mobile, AR-VR, and Automotive SoCs (Tuesday Apr. 30, 2019)
  Synopsys, Inc. (Nasdaq: SNPS) today announced its DesignWare® Video Electronics Standards Association (VESA®) Display Stream Compression (DSC) Encoder and Decoder IP for visually lossless compression across display interfaces targeting mobile, augmented/virtual reality, and automotive system-on-chips (SoCs).
  
  
• Intilop Delivers Their Enhanced One Thousand TCP/UDP Session Hardware Accelerator and Kernel Bypass Linux Driver for Hyper-Performance Networking Systems (Thursday Apr. 25, 2019)
  Intilop delivers their Enhanced 10G bit 1K concurrent-TCP&UDP- Session Hardware Accelerator with Kernel-Bypass Linux driver for Altera/Xilinx FPGA boards. This 10G Hardware/Software subsystem with TCP Accelerator (TCP-Full-Offload-Engines) implements One Thousand Simultaneous TCP/UDP Connections and Bandwidth of more than 1 Gigabyte/sec per port regardless of number of simultaneous or active TCP Sessions with Kernel Bypass driver is unprecedented.
  
  
• Gyrfalcon Technology Introduces IP Licensing Model for Greater Customization for AI Chips from "Edge to Cloud" (Thursday Apr. 25, 2019)
  Gyrfalcon Technology Inc. (GTI), the chip innovator with the industry's densest AI inference accelerators, is offering the technology powering the company's Lightspeeur® 2801 and 2803 AI accelerators for use in custom SoC designs through a new IP licensing model for companies seeking the ultimate level of chip customization.
  
  
• Mobiveil, Inc. today announced availability of its PCI Express 5 controller IP (Tuesday Apr. 23, 2019)
  While supporting raw speed is essential, Mobiveil’s PCIe® 5.0 architecture IP ensures high degree of configurability, reliability and serviceability, crucial for supporting critical applications in Networking, Storage, Server, AI, Telecom, Consumer and IOT.
  
  
• Arasan Announces its Total eMMC IP Solution on TSMC 7nm Process Technology (Tuesday Apr. 23, 2019)
  The eMMC PHY IP, silicon-proven on TSMC’s industry leading 7nm process, is seamlessly integrated with Arasan eMMC 5.1 Host Controller IP and Software, providing customers a Total eMMC IP Solution on TSMC 7nm process.
  
  
• Digital Blocks DB9000 TFT LCD and OLED Display Controller & Processor IP Application Leadership Advancements (Tuesday Apr. 23, 2019)
  Digital Blocks DB9000 Display Controller & Processor IP Core Family Extends Leadership Across Medical, Industrial, Aerospace, Automotive, Communications, Computer, Monitor, Consumer, IoT, AR/VR Headsets, Wearables, Signage, and Cinema Applications
  
  
• Allegro DVT Introduces the Industry First Real-Time AV1 Video Encoder Hardware IP for 4K/UHD Video Encoding Applications (Thursday Apr. 18, 2019)
  Allegro DVT, a leading provider of video semiconductor IP solutions, today announced the availability of its AL-E210 multi-format video encoder hardware IP which adds support for the new AV1 video format developed by the Alliance for Open Media (AOMedia).
  
  
• Rambus Announces Tapeout and Availability of 112G Long Reach SerDes PHY on Leading-edge 7nm Node for High-Performance Communications and Data Centers (Thursday Apr. 18, 2019)
  Today Rambus Inc. (NASDAQ: RMBS) announced its newest portfolio solution of 112G Long Reach (LR) SerDes PHY on a leading-edge 7nm process node for next-generation terabit switches, routers, optical transport networks (OTNs), and high-performance networking equipment.
  
  
• Cadence LPDDR4/4X Memory IP Subsystem Achieves ISO 26262 ASIL C Certification from SGS-TUV Saar Using TSMC 16FFC Process Technology (Wednesday Apr. 17, 2019)
  Cadence Design Systems, Inc. (NASDAQ: CDNS) today announced that the Cadence® LPDDR4/4X memory IP subsystem, utilizing TSMC’s 16nm FinFET Compact (16FFC) technology, has achieved ISO 26262 ASIL C certification from SGS-TÜV Saar.
  
  
• M31 Technology Develops SRAM Compiler IP on TSMC's 28nm Embedded Flash Process Technology Providing High Performance and Low Power Solutions (Wednesday Apr. 17, 2019)
  M31's SRAM Compiler IP solutions on TSMC's 28nm Embedded Flash process technology will enhance SoC designs on power and performance for mobile, power management, IoT, and automotive electronics applications.
  
  
• Omnitek achieves world-leading CNN performance per watt in a midrange programmable device. (Tuesday Apr. 16, 2019)
  Omnitek today announced immediate availability of a new Convolutional Neural Network, delivering world-leading performance per watt at full FP32 accuracy in a midrange SoC FPGA.
  
  
• SiFive Tapes Out First in a Series of 7nm IP Enablement Platforms (Thursday Apr. 11, 2019)
  SiFive today announced it has successfully taped out an IP enablement platform in 7nm FinFET technology that includes critical IP validation for SiFive's high bandwidth memory (HBM2E) 3.2Gbps interface, 2GHz Ternary Content-Addressable Memory (TCAM) partner IP, a low-voltage differential signaling (LVDS) interface and other key IP building blocks.
  
  
• Wave Computing Unveils New Licensable 64-Bit AI IP Platform to Enable High-Speed Inferencing and Training in Edge Applications (Thursday Apr. 11, 2019)
  Wave’s TritonAI 64 platform delivers 8-to-32-bit integer-based support for high-performance AI inferencing at the edge now, with bfloat16 and 32-bit floating point-based support for edge training in the future.
  
  
• Flex Logix Launches InferX X1 Edge Inference Co-Processor That Delivers Near-Data Center Throughput at a Fraction of the Power and Cost (Wednesday Apr. 10, 2019)
  Flex Logix® Technologies, Inc. today announced that it has leveraged its core patent-protected interconnect technology from its embedded FPGA (eFPGA) line of business combined with inference-optimized nnMAX™ clusters to develop the InferX X1 edge inference co-processor.
  
  
• Creonic Shows 100 Gbps Polar Decoder in International SENDATE-TANDEM Research Project (Wednesday Apr. 10, 2019)
  Creonic is pleased to announce its successful participation in the SENDATE-TANDEM (Tailored Network for Data Centers in the Metro) research project, which is a sub-project of the CELTIC SENDATE project.
  
  
• SiFive Launches the World's Smallest Commercial 64-bit Embedded Core (Wednesday Apr. 10, 2019)
  SiFive today announced the launch of the S2 Core IP Series at the Linley Spring Processor Conference in Santa Clara. The S2 Core IP Series is a 64-bit addition to SiFive’s 2 Series Core IP and brings advanced features to SiFive’s smallest microcontrollers.
  
  
• Faraday Unveils RISC-V ASIC Solution to Support Edge AI and IoT SoCs (Tuesday Apr. 09, 2019)
  Faraday Technology Corporation (TWSE: 3035), a leading ASIC design service and IP provider, today revealed that its RISC-V based ASIC platform solution has been successful in the design and mass production of next-generation edge AI and IoT system-on-chips (SoCs).
  
  
• Vidatronic Announces Series of 40 nm Integrated Power Management Unit (PMU) IP Cores Optimized for Wireless and NB-IoT Applications (Tuesday Apr. 09, 2019)
  The PMU IP cores are optimized for integration into Application Specific Integrated Circuits (ASICs) or Systems-on-a-Chip (SoCs), including radio frequency (RF), wireless, and narrowband Internet of Things (NB-IoT) applications.
  
  
• intoPIX announces availability of TICO-XS IP-cores supporting HD and 4K with a low FPGA footprint at NAB 2019 (Monday Apr. 08, 2019)
  intoPIX, leading provider of innovative compression technol-ogies, announced today the release of their first TICO-XS IP-cores for Intel and Xilinx FPGAs. TICO-XS is the next generation of popular TICO lightweight compression, being standardized as JPEG XS at the ISO JPEG committee.
  
  
• Sofics Releases Analog IO's and ESD protection clamps for Advanced Applications using TSMC 7nm FinFET process (Monday Apr. 08, 2019)
  Sofics bvba, a leading semiconductor integrated circuit IP provider announced that it has expanded its TakeCharge® Electrostatic Discharge (ESD) and Analog IO portfolio with solutions for the TSMC 7nm FinFET process.
  
  
• PLDA Announces Two Innovative vDMA Engine IP Solutions, Delivering Robust Performance and Scalability across a PCIe link or AMBA AXI fabric (Thursday Apr. 04, 2019)
  PLDA today announced two innovative DMA engine solutions designed to manage large and heterogeneous data traffic across a PCIe link or across an AMBA AXI fabric solution. PLDA’s new IP products are an elegant and streamlined solution that delivers high-end performance and is easy to integrate into design planning.
  
  
• Attopsemi's I-fuse OTP Passed 3 lots of HTS and HTOL Qualification for 1,000hr on GLOBALFOUNDRIES 22FDX FD-SOI Technology (Monday Apr. 01, 2019)
  Attopsemi's I-fuse™ provides small size, high reliability, low program voltage/current, low power and wide temperature to enable GLOBALFOUNDRIES 22nm FDX® for AI, IoT, automotive, industry, and communication applications
  
  
• The MOST Ultimate OTP Technology - AGIC Particle Momentum (Monday Apr. 01, 2019)
  The AGIC Particle Momentum, or we called AGIC momentum, is a progress to control atom movement in semiconductor by controlling the interaction between atom and electron momentum.
  
  
• Omnitek Releases Highly Optimised 3D LUT IP for FPGAs (Monday Apr. 01, 2019)
  Omnitek today announced immediate availability of a unique 3D LUT for colour space conversions and conversion between nonlinear gamuts. This is a critical function in high-demand applications such as Rec. 709/2020 and SDR/HDR conversions, chroma keying and artistic effects such as sepia, black-and-white or vivid colour.
  
  
• Wave Computing Releases First MIPS Open Program Components to Accelerate Innovation for Next-Generation System on Chip Designs (Thursday Mar. 28, 2019)
  Wave Computing®, the Silicon Valley company that is accelerating artificial intelligence (AI) from the datacenter to the edge, announced the first release of its MIPS Open™ program components based on Wave’s renowned MIPS instruction set architecture (ISA) and recent architectural extensions.
  
  
• Achronix Demonstrates Silicon Validation Device with 112 Gbps SerDes (Wednesday Mar. 27, 2019)
  Achronix today announced that it has completed testing and is now demonstrating the 112 Gbps SerDes that will be used in its next-generation FPGAs.