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IP / SOC Products News

• Dolphin Integration reveals the standard power kit library DELTA to ease the deployment of an optimal power management network into a SoC (Monday Nov. 24, 2014)
  To overcome the power challenge, Power Management Networks (PMNet) are becoming more and more complex. Making the right choices for embedding PMNets into System-on-Chips (SoC) might result in tricky issues for the integrator.
  
  
• PLDA Introduces XpressRICH4: The PCIe 4.0 Controller of Choice When Performance Matters (Wednesday Nov. 19, 2014)
  PLDA has introduced XpressRICH4, a highly configurable PCIe 4.0 interface soft IP designed for ASIC implementations and seamless FPGA prototyping implementations. Building on PLDA’s long history of numerous tape-outs in leading-edge process technologies, XpressRICH4 includes advanced features such as single root I/O virtualization (SR-IOV) and data-path protection.
  
  
• Elliptic Technologies Unveils Future-Proof Secure Hardware Root of Trust Technology (Wednesday Nov. 19, 2014)
  Elliptic Technologies today unveiled tRoot™, its future-proof secure hardware root of trust technology targeting the increasing security challenges in the Internet of Things (IoT).
  
  
• Credo Tapes Out Industry-leading Serdes IP on 16-nm FinFET+ Process (Wednesday Nov. 19, 2014)
  Credo Semiconductor today announced it has successfully taped out its popular 28G and 56G SerDes transceiver IP on TSMC's 16-nm FinFET+ (FF+) process. By successfully porting its IP to this advanced processing node, Credo enables ASSP, ASIC and SoC designers to deliver solutions that address the growing performance and bandwidth demands of next-generation 100G and 400G networks.
  
  
• Synopsys Expands IP Accelerated Initiative with New DesignWare IP Prototyping Kits for 10 Interface Protocols (Wednesday Nov. 19, 2014)
  Synopsys today expanded its IP Accelerated initiative with new DesignWare® IP Prototyping Kits for 10 interface protocols, including USB 3.0, SSIC, PCI Express 2.0, PCI Express 3.0, DDR3, LPDDR3, LPDDR2, MIPI CSI-2, HDMI 2.0 and JEDEC UFS.
  
  
• Open-Silicon Announces Availability of World's First HMC 2.0 Memory Controller IP (Wednesday Nov. 19, 2014)
  Open-Silicon today announced a comprehensive Hybrid Memory Cube (HMC) 2.0 controller solution as licensable Intellectual Property (IP) that will enable SoC designers to take immediate advantage of the performance gains afforded by the emerging memory standard.
  
  
• Rambus and Mobiveil Partner to Bring Pre-Validated Solution to Chip Makers, Delivering Memory Flexibility and Accelerated Time-to-Market (Wednesday Nov. 19, 2014)
  Rambus Inc. and Mobiveil today announced they have validated interoperability of the Rambus R+™ DDR4 Multi-modal PHY with the Mobiveil Universal Multiport Memory Controller (UMMC) Core for JEDEC standard DDR4/3 and LPDDR3/2 operation.
  
  
• eMemory Offers IP Industry-Leading Hybrid MTP SIP (Wednesday Nov. 19, 2014)
  Targeting the market demand of integrated IC, eMemory announced today the availability of Hybrid MTP, a leading integrated Multiple Times Programmable (MTP) Silicon Intellectual Property (SIP). Base on the applications, clients can select the suitable OTP solution (NeoBit) and MTP solution (NeoMTP) from eMemory’s diverse SIP portfolio, and customize the composition of OTP and MTP in the Hybrid MTP.
  
  
• Chelsio Launches Terminator Core IP (Friday Nov. 14, 2014)
  Chelsio Communications, a leading provider of 40Gb Ethernet (40GbE) Unified Wire Adapters and ASICs, announced today that it has launched a new product offering, the Terminator Core, a configurable kit for building high performance Converged Ethernet solutions.
  
  
• Xilinx Announces Industry's First Low Latency 25G Ethernet IP for FPGAs to Address Throughput Challenges in Data Center Applications (Wednesday Nov. 12, 2014)
  Xilinx today announced the industry's first low latency 25G Ethernet IP for FPGAs to address throughput challenges in data center applications. The low latency 25G Ethernet MAC and PCS LogiCORE™ IP solution helps to reduce data center CapEx by providing a migration path from 10G to 25G links and delivers a drastic increase in performance by more than doubling the front panel bandwidth between top of rack switches and servers (10G to 25G).
  
  
• NTLab announces highly linear GPS/GLONASS/Galileo/BeiDou RF front-end with reduced power consumption (Wednesday Nov. 12, 2014)
  NT1051 is a dual-channel multi-frequency (L1/L2/L3/L5) mutli-system (GPS/GLONASS/Galileo/BeiDou) RF front-end. Manufactured in 0.18um TSMC BiCMOS technology, it provides operability of GNSS receiver even if interference power is 120dB higher than satellite signal.
  
  
• Scalable PowerVR Series7 GPUs target applications from wearables to servers, reaching teraflop performance (Monday Nov. 10, 2014)
  Imagination Technologies introduces PowerVR Series7, the latest generation of the PowerVR Rogue GPU architecture and an entire line-up of GPUs which scale from 16 to 512 arithmetic logic unit (ALU) cores, providing unprecedented scalability, efficiency and performance.
  
  
• Dolphin Integration dedicated features for shortening and easing the Industrial Test of Audio converters (Monday Nov. 10, 2014)
  Dolphin Integration supply leading fabless companies for more than 25 years with dozens of audio converters which have been used in millions of SoCs. The cost of Industrial Test can represent up to 35 % of the fabrication cost. Therefore, the challenge is to keep the industrial test cost as low as possible while ensuring high reliability products.
  
  
• Kandou Introduces High Bandwidth, Low Power, In-Package Chip Interconnect Enabling Lower Cost Semiconductor Solutions (Thursday Nov. 06, 2014)
  Kandou Bus has announced the Glasswing™ family of chip interconnects targeted for in-package chip-to-chip links. Kandou introduced Chord™ Signaling in February 2014 and outlined how signals can be correlated across more than two wires to achieve higher bandwidth and lower power with excellent signal integrity and low latency.
  
  
• Recore Systems announces FlexaWare at electronica 2014 in Munich (Tuesday Nov. 04, 2014)
  During electronica 2014 in Munich next week, Recore Systems announces FlexaWare®, an easy programmable, flexible many-core embedded platform. The FlexaWare® platform consists of hardware, a runtime and a software development environment. It is designed from the ground up to offer the flexibility and scalability needed to cater to a range of applications from clear cut to compute intensive and massively parallel.
  
  
• Synopsys Announces Availability of DesignWare Non-Volatile Memory IP for TowerJazz 180-nm Process Technology (Thursday Oct. 30, 2014)
  Synopsys today announced the availability of the silicon-proven DesignWare® AEON® Few Time Programmable (FTP) Trim Non-Volatile Memory (NVM) IP for TowerJazz 180-nanometer (nm) SL process technology.
  
  
• Synopsys' New DesignWare Sensor and Control IP Subsystem Delivers Ultra Low Power Sensor and Control Processing for SoCs (Wednesday Oct. 29, 2014)
  Synopsys today announced the new DesignWare® Sensor and Control IP Subsystem, a complete hardware and software solution optimized for a wide range of ultra-low power embedded sensor and control applications.
  
  
• Synopsys' New USB 3.1 IP Solution Enables 10 Gbps Data Transfer Speeds for Storage, Digital Office and Mobile Applications (Tuesday Oct. 28, 2014)
  Synopsys today introduced the industry's first USB 3.1 IP solution, consisting of DesignWare® USB 3.1 Device Controller, an IP Virtual Development Kit (VDK) and verification IP (VIP) to accelerate the development of high-performance storage, digital office and mobile system-on-chip (SoC) applications.
  
  
• TSMC, Kilopass Deliver NVM OTP IP for the 16FinFET Process Node (Tuesday Oct. 28, 2014)
  Kilopass announced today that it has successfully ported its one-time programmable (OTP) NVM technology to TSMC’s 16 nanometer (nm) FinFET process.
  
  
• ARM System-wide Approach Delivers Efficient, Rich Media Solution (Tuesday Oct. 28, 2014)
  ARM today announced a suite of integrated media IP designed to efficiently deliver rich visual content. The ARM® Mali™ media IP suite is ideal for the highest volume segments for smartphones and tablets, which is currently a billion unit opportunity.
  
  
• Dolphin Integration reveal a cost effective solution to handle over-voltage operation in battery powered SoCs (Monday Oct. 27, 2014)
  Until now, portable devices supplied by USB, Li-ion or NiMH batteries with voltage levels up to 5.5 V could not use standard process devices, such as 3.3 V CMOS I/O transistors. This thus lead Fabless companies to use expensive alternatives, such as external regulators or expensive process options, including HV/BCD processes. Today, Dolphin Integration propose a cost effective alternative to such solutions with a set of Over-voltage Protection Modules (OPM).
  
  
• Soft Machines Unveils VISC Microprocessor Architecture Breakthrough; Revives Performance-per-Watt Scaling (Friday Oct. 24, 2014)
  Soft Machines Inc., a Silicon Valley-based semiconductor startup company, today announced the Soft Machines VISC™ architecture. The VISC architecture is a breakthrough in microprocessor performance-per-watt scaling and will significantly improve performance and power for all segments of the computing ecosystem.
  
  
• SMIC and Maxscend collaborate on 55nm RF IP platform (Thursday Oct. 23, 2014)
  SMIC and Maxscend Technologies announced that Maxscend Bluetooth RF IP has been silicon proven on SMIC's 55nm Low Leakage (LL) logic process. This IP has now been integrated into one of SMIC customers' product tape-out.
  
  
• ARM Extends Scalability of CoreLink for Infrastructure Compute (Thursday Oct. 23, 2014)
  ARM today announced new additions to its suite of enterprise-class ARM® CoreLink™ Cache Coherent Network (CCN) SoC interconnects, underscoring its commitment to providing a flexible architecture from sensors to servers. The CoreLink CCN-502 and CoreLink CCN-512 interconnects extend the current family for data center and infrastructure equipment that scales from the edge of the network to the core.
  
  
• Intilop's 16K Concurrent TCP & UDP Session Accelerator Core - Xilinx Platform Now Available for Immediate Deployment in Data Center and High Performance Computing (Thursday Oct. 23, 2014)
  Intilop has released their 16K concurrent-TCP-session Hardware Accelerator Pre-Ported and tested on an Alpha Data ADM-PCIE-7V3 card. This deployment ready with pre-ported and verified 10G TCP Accelerator (TCP Full Offload Engines) that implements16 Thousand Simultaneous TCP Connections, unlimited continuous connections and Bandwidth of more than 1.1 Gigabyte/sec per port regardless of number of simultaneous or active TCP Sessions.
  
  
• Tamba Releases New Ultra-Low Latency Ethernet Cores for Xilinx UltraScale 20nm FPGA - Lowest Latency Achieved on an FPGA Device (Wednesday Oct. 22, 2014)
  Tamba Networks today announced the availability of version 2 of its Ethernet IP products for use on Xilinx, Inc. Virtex® UltraScale™ devices. This latest release delivers new performance enhancements that further increase the latency and size gap between existing IP available from other vendors.
  
  
• New BA20 Processor IP Features "Zero-Stage Pipeline" for Energy and Performance Efficiency (Wednesday Oct. 22, 2014)
  Wearable devices, Internet of Things (IoT) sensors, and other mobile products challenge the limits of modern processor efficiency, with features requiring significant processing capability but also demanding ultra-low energy consumption. A new 32-bit processor announced today by Beyond Semiconductor and CAST Inc. meets this challenge by combining state-of-the-art design techniques with an architectural feature seemingly drawn from the past: a zero-stage execution pipeline the companies call the PipelineZero™ Architecture.
  
  
• eMemory NeoEE SIP Advances into Automotive Electronics Applications (Tuesday Oct. 21, 2014)
  Following the expansion of multiple-time programmable (MTP) silicon IP (SIP) NeoEE in wireless communication applications; eMemory, the global leader in embedded non-volatile memory (eNVM) announced today the specification upgrade of NeoEE from consumer electronics level (85℃/10 years) to 150℃/10 years, which meets the AEC-Q100 Grade 0 required by automotive electronics.
  
  
• Synopsys Introduces Industry's First On-Chip Memory Test and Repair Solution for Embedded Flash (Monday Oct. 20, 2014)
  Synopsys today introduced the DesignWare® STAR Memory System® for Embedded Flash product, the industry's first integrated memory test and repair solution with test algorithms optimized for on-chip embedded flash memories.
  
  
• Dolphin Integration introduce a new foundry sponsored low power memory for LCD Drivers and Touch Screen Controllers (Monday Oct. 20, 2014)
  In order to reach the stringent low power requirements of LCD Drivers and Touch Screen Controllers, Dolphin Integration launch a foundry sponsored Single port RAM for the UMC 110 nm embedded Flash process.