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FPGA / CPLD Articles

• How FPGA packaging drives signal integrity (May. 16, 2005)
  Until recently, signal integrity has been a concern relegated predominantly to multi-gigabit serial interface design.
  
  
• FPGAs aid in high-end memory interface design (May. 09, 2005)
  As designers of high-performance systems labor to achieve higher bandwidth while meeting critical timing margins, one performance bottleneck standing in their way is the memory interface
  
  
• Bridging the Wi-Fi/Embedded Divide (Apr. 05, 2005)
  Bridging the Wi-Fi/Embedded Divide
  
  
• How to create beam-forming smart antennas using FPGAS (Feb. 17, 2005)
  How to create beam-forming smart antennas using FPGAS
  
  
• Entering the Backplane Fast Lane (Dec. 22, 2004)
  Current state-of-the-art backplanes used on comm equipment designs bundle 1- to 3-Gbit/s lanes to create a 10-Gbit/s connection to support Gigabit Ethernet or Sonet OC-192 traffic. While a good option today, this concatenated lane approach will ultimately give way to the development of a single-lane 10-Gbit/s I/O in order to meet the cost and performance demands of next-generation equipment designs.
  
  
• Integrating High Speed Serial Transceivers into an FPGA (Oct. 08, 2004)
  Integrating High Speed Serial Transceivers into an FPGA
  
  
• Platform FPGAs enter SoC land (Sep. 13, 2004)
  Platform FPGAs enter SoC land
  
  
• Flash-based FPGAs serve point-of-sale apps (Sep. 13, 2004)
  Flash-based FPGAs serve point-of-sale apps
  
  
• Advantages of FPGA design methodologies (Jul. 30, 2004)
  Advantages of FPGA design methodologies
  
  
• FPGAs accelerate time to market for industrial designs (Jul. 02, 2004)
  FPGAs accelerate time to market for industrial designs
  
  
• An FPGA primer for ASIC designers (Apr. 15, 2004)
  An FPGA primer for ASIC designers
  
  
• Are FPGA soft cores tomorrow's MCUs? (Apr. 02, 2004)
  Are FPGA soft cores tomorrow's MCUs?
  
  
• FPGAs step up to SoC challenge (Mar. 15, 2004)
  FPGAs step up to SoC challenge
  
  
• FPGA programming step by step (Mar. 04, 2004)
  FPGA programming step by step
  
  
• 90-nm FPGAs handle 10-Gbit traffic management tasks (Mar. 01, 2004)
  90-nm FPGAs handle 10-Gbit traffic management tasks
  
  
• Minding network queues with FPGAs and memory (Feb. 05, 2004)
  Minding network queues with FPGAs and memory
  
  
• Accelerating algorithms in hardware (Jan. 20, 2004)
  Accelerating algorithms in hardware
  
  
• Optimizing Up/Down Conversion with FPGA Techniques (Dec. 23, 2003)
  Optimizing Up/Down Conversion with FPGA Techniques
  
  
• Keys to reconfigurable SDR system design (Nov. 13, 2003)
  Keys to reconfigurable SDR system design
  
  
• Developing and Integrating FPGA Co-processors with the TiC6X Family of DSP Processors (Oct. 28, 2003)
  Developing and Integrating FPGA Co-processors with the TiC6X Family of DSP Processors
  
  
• Design Security in Nonvolatile Flash and Antifuse FPGAs (Oct. 24, 2003)
  Design Security in Nonvolatile Flash and Antifuse FPGAs
  
  
• The future of programmable logic (Oct. 02, 2003)
  The future of programmable logic
  
  
• FPGAs lower costs for RSA cryptography (Sep. 29, 2003)
  FPGAs lower costs for RSA cryptography
  
  
• Techniques to make clock switching glitch free (Jun. 26, 2003)
  Techniques to make clock switching glitch free
  
  
• Cryptographically Enforced Pay-Per-Use Licensing of FPGA Design Intellectual Property (May. 09, 2003)
  Cryptographically Enforced Pay-Per-Use Licensing of FPGA Design Intellectual Property
  
  
• Silicon virtual prototyping eyed for FPGAs (May. 05, 2003)
  Silicon virtual prototyping eyed for FPGAs
  
  
• FPGA Design for Real-Time Applications (Apr. 30, 2003)
  FPGA Design for Real-Time Applications
  
  
• FPGA Clock Schemes (Feb. 10, 2003)
  One of the most important steps in the design process is to identify how many different clocks to use and how to route them. This article tells you how to use routing resources efficiently.
  
  
• A case for using FPGAs in SDR PHY (Aug. 09, 2002)
  A case for using FPGAs in SDR PHY
  
  
• FPGAs: Embedded Apps : Telecom puts new spin on programmable logic (Jul. 01, 2002)
  FPGAs: Embedded Apps : Telecom puts new spin on programmable logic