FPGA / CPLD News
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Lattice Announces Updates and Enhancements to its FPGA Design Tool Suite (Monday Jun. 15, 2009)
Lattice today announced the immediate availability of Service Pack 2 for Version 7.2 of its ispLEVER® FPGA design tool suite. SP2 is a particularly important update for users of LatticeECP3™ devices, and also includes support for new LatticeXP2™ devices.
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Lattice Announces New Automotive Qualified Chip Scale 132 BGA Packaging for the LatticeXP2 Family (Monday Jun. 08, 2009)
Based on Lattice's 90 nanometer hybrid flexiFLASH™ technology, the XP2 family's new Chip Scale packaging enables realization of design requirements in the tightest form-factor automotive applications such as automotive camera modules, telematics systems, parking assistance systems and multimedia systems.
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Altera Eases Development of 40-nm FPGAs with Stratix IV GX FPGA Development Kit (Wednesday Jun. 03, 2009)
Altera today announced availability of the Stratix® IV GX FPGA Development Kit. The kit features hardware and software solutions for the rapid creation of designs using Altera's high-performance 40-nm Stratix IV GX FPGAs with integrated 8.5-Gbps transceivers.
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Altera Ships Highest Density, Highest System-Bandwidth FPGA Targeting 40G/100G Applications (Monday Jun. 01, 2009)
Altera today announced availability of the industry's highest density, highest system-bandwidth FPGA to address the stringent demands of today's bandwidth-heavy applications. Featuring 11.3-Gbps transceivers and 530K logic elements (LEs), the Stratix® IV GT EP4S40G5 and EP4S100G5 FPGAs are the latest variants of Altera's 40-nm Stratix IV FPGA family shipping to customers.
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Altera Ships Arria II GX FPGAs: High-Performance, Low-Cost Transceiver FPGAs for 3-Gbps Applications (Monday May. 18, 2009)
Altera today announced it has started shipping Arria® II GX devices, its second family of 40-nm FPGAs. The Arria II GX family with integrated transceivers joins Stratix® IV GX and Stratix IV GT FPGAs and HardCopy® IV GX ASICs to extend the industry’s broadest portfolio of transceiver FPGA and ASIC solutions.
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New Xilinx Virtex-5Q FPGA Family Delivers Higher Performance and Advanced Security Technologies for Defense Systems (Monday May. 11, 2009)
Xilinx today introduced the Xilinx(R) Virtex(R)-5Q family of field programmable gate arrays (FPGAs) for the Aerospace and Defense (A&D) industry. Virtex-5Q FPGAs provide the silicon foundation for a host of applications, including Xilinx's single-chip cryptography (SCC) targeted design platform aimed at accelerating development of next-generation secure communications systems.
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Pigeon Point Systems Announces MicroTCA Carrier Management Controller BMR Starter Kit Using Fusion Mixed-Signal FPGA (Monday May. 11, 2009)
Pigeon Point Systems (PPS), an Actel company, announced today a new MicroTCA® Carrier Management Controller (MCMC) Board Management Reference (BMR) Starter Kit based on Actel's mixed-signal Fusion FPGA. The new starter kit delivers a world class solution for the mandatory management controllers used in MicroTCACarrier Hub (MCH) modules, including the Carrier Manager and Shelf Manager functions.
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New Actel Design Examples Boost Productivity for Low-Power Designers (Monday May. 04, 2009)
Actel today announced the immediate availability of eight free-of-charge design examples for use with its low-power, flash-based FPGAs. These design examples feature complete and fully tested solutions that are ready-to-use and customizable.
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Xilinx Drives Evolution of FPGA Design With Domain-specific Methodology for Targeted Design Platforms (Monday Apr. 27, 2009)
Xilinx today announced that it is now shipping ISE(R) Design Suite 11.1, the industry's first FPGA design solution with fully interoperable domain-specific design flows and user-specific configurations for logic, digital signal processing (DSP), embedded processing, and system-level design.
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Actel and Avnet Offer Comprehensive Solution for Display Applications (Monday Apr. 27, 2009)
To demonstrate the flexibility of its FPGAs for liquid crystal display (LCD) solutions, Actel today announced the availability of five free-of-charge reference designs to enable the design and deployment of display applications quickly and effectively. The validated and tested reference designs are implemented using the IGLOO® Video Demo Kit, which was jointly developed by Actel, Attodyne and Avnet Memec.
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Xilinx Enables China's First HDTV I/O Card from Dayang (Wednesday Apr. 22, 2009)
Xilinx today announced that the new Red Bridge III HD Video I/O Card from Dayang Technology Development is enabled by the DSP-optimized Xilinx(R) Virtex(R)-5 SXT family of programmable devices.
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Altera's Stratix III FPGAs Chosen for Harmonic's Next-Generation Universal Broadcast Video Encoder (Monday Apr. 20, 2009)
Altera® Stratix III devices are used in Harmonic's DiviCom Electra 8000, the world's first encoding and transcoding platform to support MPEG-4 AVC (H.264) and MPEG-2 CODECs in standard-definition (SD) and HD formats up to full frame-rate 1080p 50/60.
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Pigeon Point Systems Ships ATCA Starter Kits Based on Actel Fusion Mixed-Signal FPGA (Wednesday Apr. 15, 2009)
Pigeon Point Systems and its parent, Actel Corporation (Nasdaq: ACTL), today announced that Pigeon Point Systems is now shipping AdvancedTCA® (ATCA) Board Management Reference (BMR) starter kits for Actel's Fusion® mixed-signal FPGAs
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Altera Arria GX FPGAs Enable Panasonic P2 Drive to Transfer Video Faster Than You Can Say Edit (Monday Apr. 13, 2009)
Altera today announced Panasonic has selected Altera's Arria® GX FPGAs, PCI Express (PCIe) MegaCore® IP and Nios® II processor solution for its new AJ-PCD35, five-slot P2 (tapeless format) memory-card drive.
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Altera's 40-nm Stratix IV GX FPGAs Achieve PCI-SIG Compliance for the PCI Express 2.0 Architecture (Thursday Apr. 02, 2009)
Altera today announced its 40-nm Stratix® IV GX FPGAs are compliant with version 2.0 of the PCI Express® (PCIe®) standard, providing users a comprehensive PCIe solution for high-bandwidth applications. Stratix IV GX FPGAs achieved compliance for PCIe 1.1 and PCIe 2.0 up to x8 lane configurations for end-point applications. Stratix IV GX FPGAs are shipping today with PCIe 2.0 hard intellectual property (IP) blocks.
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Actel Now Shipping the IGLOO PLUS Starter Kit (Wednesday Apr. 01, 2009)
Actel today announced the availability of the low-cost IGLOO PLUS Starter Kit. The new kit features the IGLOO® PLUS family of low-power field programmable gate arrays (FPGAs), which offer the industry's best power-, logic- and feature-per-I/O ratios in a programmable device.
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Xilinx Starts Shipments of Virtex-6 FPGAs (Wednesday Apr. 01, 2009)
The new Virtex-6 and low-cost Spartan(R)-6 families, both announced in February this year, offer the industry's lowest cost, lowest power, largest density, highest performance and highest system bandwidth by lowering total system cost by up to 50%, reducing total power consumption by up to 65%, and delivering an unprecedented capacity of 760,000 logic cells.
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SiliconBlue Introduces New iCEman65 Evaluation Kit for Ultra Low-Power, Single-Chip iCE65 SRAM FPGAs (Monday Mar. 30, 2009)
SiliconBlue Technologies today announced the immediate availability of iCEman65, a powerful new evaluation and development kit for low-power designs based on the iCE65 FPGA. Also available are two new Peripheral Daughter Modules (PDM1 and PDM2) showcasing the extensive IP capabilities of the iCE65 FPGA.
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Xilinx Demonstrates Next-Generation 100GE Interface with Best-in-Class Ecosystem Support (Tuesday Mar. 24, 2009)
Xilinx, NetLogic Microsystems, Inc., Sarance Technologies, Inc., Avago Technologies and Ixia will demonstrate 100Gbps of real Ethernet traffic across the world's first single-FPGA 100GE targeted design platform for telecommunications equipment manufacturers.
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Altera Ships Industry's Highest Density Transceiver FPGAs (Tuesday Mar. 17, 2009)
Altera today announced silicon availability of the industry’s highest density transceiver FPGA. As the second member of the Altera® Stratix® IV GX FPGA family to ship, the EP4SGX530 is 60 percent larger than the largest transceiver FPGA on the market.
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Altera's Embedded Systems Development Kit Accelerates the Creation of Cyclone III FPGA-Based Embedded Designs (Monday Mar. 16, 2009)
Altera today announced availability of its Embedded Systems Development Kit, Cyclone® III FPGA Edition. This multi-board development kit features a Cyclone III EP3C120 device, the industry's highest density, low-cost FPGA currently shipping and combines a robust set of on-board memories, I/O interfaces, peripherals and pre-built reference designs.
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Actel Announces SoftConsole Version 2.2 -- Free Embedded Software Development Environment (Monday Mar. 16, 2009)
Leveraging Actel's IGLOO® low-power FPGAs and Actel Fusion® mixed-signal FPGAs, SoftConsole is a single programming environment that enables software engineers to write and debug C and C++ programs targeted at Actel's portfolio of embedded processors, including ARM® Cortex™-M1 and Core8051s.
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Actel's New Fusion Embedded Development Kit Showcases Unique Mixed-Signal FPGA Design Capabilities (Monday Mar. 09, 2009)
Actel today announced the Fusion Embedded Development Kitt, enabling system designers to quickly and cost effectively prototype a full system-on-a-chip design. The kit features the Actel Fusion® mixed-signal FPGA, the only one of its kind in the industry, and supports a variety of processors, including license-free versions of the ARM® Cortex™-M1 and Core8051.
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Wind River to Offer Linux Support for Altera's Nios II Embedded Processor (Monday Mar. 02, 2009)
Altera today announced the availability of Linux support for Altera's Nios® II embedded processor. Embedded developers deploying products based on the Nios II processor can use this Linux solution across Altera's entire portfolio of FPGAs and HardCopy® ASICs.
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LatticeECP2M FPGA Enables Low Cost PCI Express Bridge for VOIP Platforms Based on Intel Architecture (Monday Mar. 02, 2009)
Lattice today announced the availability of a low cost programmable PCI Express-to-High Speed Serial (HSS) bridge for the CAP12-120, a Small Office Home Office (SOHO) Voice Over IP (VOIP) platform running on Intel® architecture. The solution utilizes the LatticeECP2M's low power, high-performance SERDES and a Lattice PCI Express Intellectual Property (IP) core.
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Lattice Launches Industry's Lowest Power, Highest Value FPGA Devices (Monday Feb. 23, 2009)
Lattice today announced its third generation high value FPGAs, the mid-range 65nm LatticeECP3(TM) family, which offers the industry's lowest power consumption and price of any SERDES-capable FPGA device. The LatticeECP3 FPGA family offers multi-protocol 3.2G SERDES with XAUI jitter compliance, DDR3 memory interfaces, powerful DSP capabilities, high density on-chip memory and up to 149K LUTS, all with half the power consumption and half the price of competitive SERDES-capable FPGAs.
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Actel Rolls Out Low-Cost IGLOO nano Starter Kit (Wednesday Feb. 18, 2009)
Actel today introduced new low-cost starter kits for the company's -low-power IGLOO® nano FPGAs. Available for $49.95, the nano kits are expected to accelerate industry-wide adoption of Actel's nano FPGAs.
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Xilinx and Wintegra Collaborate on LTE Baseband Targeted Design Platform for Faster, Lower Cost Development of 4G Wireless Basestations (Monday Feb. 16, 2009)
Xilinx and Wintegra announced joint development of a 3GPP-LTE baseband targeted design platform (TDP) that significantly reduces the "bill of materials" (BOM) cost and power consumption of baseband processing as compared to conventional design approaches. Based on currently available components from both companies, the platform incorporates a high degree of flexibility and scalability, while accelerating the development of Long Term Evolution (LTE) products.
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SiliconBlue Announces Volume Production Shipments of its iCE65 Ultra-Low Power FPGAs (Monday Feb. 09, 2009)
SiliconBlue today announced volume production shipments for its 65nm, SRAM-based FPGAs for handheld, ultra-low power applications. The iCE family is the industry’s first non-volatile FPGA optimized for the rapidly growing battery powered consumer handheld market.
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Quartus II Software Version 9.0 Delivers Productivity Leadership for Altera's Portfolio of Transceiver FPGAs and HardCopy ASICs (Monday Feb. 02, 2009)
Altera today announced the availability of Quartus® II software version 9.0, the industry's leading CPLD, FPGA and HardCopy® ASIC development environment. The 9.0 version includes full support for Altera's portfolio of transceiver FPGAs and HardCopy ASICs.