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IP / SOC Products Articles

• What is TSN? (Feb. 14, 2023)
  TSN, or Time-Sensitive Networking, is a technology based on the IEEE 802.1Q standard. It has evolved from the Ethernet technology currently used to carry all types of traffic, for which ethernet was not originally intended, such as multiple data flows with different timing requirements, commonly found in Audio Video Bridging (AVB), automotive and industrial automation applications.
  
  
• Why network-on-chip IP in SoC must be physically aware (Feb. 13, 2023)
  Today, multicore system-on-chip (SoC) designs can be composed of hundreds of IP blocks, typically containing up to ten million logic gates. One way for SoC developers to create devices of this complexity is to make use of proven IP blocks provided by trusted third-party vendors.
  
  
• M31 on the Specification and Development of MIPI Physical Layer (Feb. 10, 2023)
  MIPI is the abbreviation of "Mobile Industry Processor Interface". This article will introduce the physical layer specifications of MIPI architecture, and explain the features and benefits of D-PHY and C-PHY respectively. Then, the MIPI perspective on the development and challenges of automotive electronics and the professional MIPI technical services that M31 can provide will be shared.
  
  
• LPDRAM4/4X Performance Tweaks (Feb. 06, 2023)
  In this article, we will see which parameters we can tweak inside the DDR controller for getting optimized throughput from LPDDR4/4x DRAMs.
  
  
• Selection of FPGAs and GPUs for AI Based Applications (Jan. 30, 2023)
  Even as software algorithms that mimic human thoughts and ideas are the foundation of AI, hardware is also an important component this is where the role of Field Programmable Gate Arrays (FPGAs) and Graphics Processing Units play a vital role.
  
  
• ggNMOS (grounded-gated NMOS) (Jan. 26, 2023)
  For decades, a traditional workhorse device for ESD protection for standard applications in CMOS technology has been the grounded-gate NMOS device (ggNMOS).
  
  
• Exclusive Access Monitors - Stress Validation (Jan. 23, 2023)
  In this article, we will see the methods required to stress Exclusive access monitors at target memory to uncover any bug buried deep inside the design.
  
  
• Time Interleaving of Analog to Digital Converters: Calibration Techniques, Limitations & what to look in Time Interleaved ADC IP prior to licensing (Jan. 09, 2023)
  Analog to digital converters have three key input ports along with data output ports as per digital resolution requirements. These inputs ports are Analog Signal, Reference and Clock. If we compare across most of the converter architectures then clock frequency is directly related to output data rate and latency of the data conversion.
  
  
• What Designers Need to Know About USB Low-Power States (Jan. 09, 2023)
  In addition to performance and interoperability, achieving low power has been one of the requirements for industry standards specifications. Some of the key specifications like Universal Serial Bus (USB), PCI Express (PCIe), and MIPI have defined power saving features for burst traffic. This whitepaper explains how Synopsys USB IP offers low power using various low power states that go beyond the basic features.
  
  
• VESA Video Compression on MIPI DSI-2 Enables Next-Generation Display Applications (Dec. 12, 2022)
  Over the past decade, we have seen generations of new products with increasingly sophisticated display feature sets. Each new generation pushes the boundaries of display technology even further with higher resolutions, faster refresh rates, and increased pixel depth at the forefront of these developments.
  
  
• Is your career at RISK without RISC-V? (Dec. 02, 2022)
  I am delighted to share my technical insights into RISC-V in this article to inspire and prepare the next generation of chip designers for the future of the open era of computing. If you understand how we build complex electronic devices like desktops and smartphones using processors, you would be more interested in learning and exploring the Instruction Set Architectures.
  
  
• Radiation Tolerance is not just for Rocket Scientists: Mitigating Digital Logic Soft Errors in the Terrestrial Environment (Nov. 28, 2022)
  As technology scales, soft errors from particle radiation are becoming increasingly concerning for in-field reliability. These radiation effects are called Single Event Upsets (SEU) and the frequency of the failures due to SEUs is known as the Soft Error Rate (SER). Soft errors are failures due to external sources. By contrast, hard errors refer to actual process manufacturing defects or electromigration defects that get formed during circuit operation.
  
  
• How Low Can You Go? Pushing the Limits of Transistors - Deep Low Voltage Enablement of Embedded Memories and Logic Libraries to Achieve Extreme Low Power (Nov. 21, 2022)
  Rising demand for cutting-edge mobile, IoT, and wearable devices, along with high compute demands for AI and 5G/6G communications, has driven the need for lower power systems-on-chip (SoCs). This is not only a concern for a device’s power consumption when active (dynamic power), but also when the device is not active (leakage power).
  
  
• Efficient Verification of RISC-V processors (Nov. 16, 2022)
  Processor verification, however, is never trivial but requires combining the strengths of multiple verification techniques. This technical paper considers how to efficiently verify a RISC-V processor using a multi-layered approach known as the Swiss cheese model adapted from the world of avionics.
  
  
• Integrating high speed IP at 5nm (Nov. 14, 2022)
  In this article, we will look at the new challenges which have been introduced due to 5nm technology as well due to new additional functionality in SoC. We will show the approach to tackle the floor planning and timing issue to reduce the physical implementation iteration.
  
  
• Put a Data Center in Your Phone! (Nov. 07, 2022)
  Datacenters heavily leverage FPGAs for AI acceleration. Why not do the same for low power edge applications with embedded FPGA (eFPGA)?
  
  
• Driving ADAS Applications with MIPI CSI-2 (Nov. 03, 2022)
  We’re all familiar with seeing social media influencers on our mobile phones these days, but when you think about it, the real influencers are the mobile phones themselves. Over the past decade, as mobiles have evolved and pushed all sorts of technological boundaries, they have influenced other industries to follow suit.
  
  
• Compute Express Link 3.0 (Oct. 24, 2022)
  Compute Express Link™ (CXL™) is an open industry standard interconnect offering high-bandwidth, low-latency connectivity between host processor and devices such as accelerators, memory buffers, and smart I/O devices.
  
  
• Next-Generation Voice Assisted Solutions (Oct. 17, 2022)
  With the emergence of advanced AI technologies, companies may create synthetic speech that sounds like a human voice to resolve customer queries more effectively. Businesses across a variety of industries, including retail, automotive, media & entertainment, and healthcare, are realising the benefits of the technology and are using it to provide better, and more individualized customer experiences.
  
  
• Arteris System IP Meets Arm Processor IP (Oct. 12, 2022)
  The design of system-on-chip (SoC) devices for automotive applications—and the reuse of portions of those designs for future SoC incarnations—just got a lot easier with the recent announcement of the expanded partnership between Arm and Arteris.
  
  
• O-RAN Fronthaul Security using MACsec (Oct. 10, 2022)
  With 5G being deployed for time-sensitive applications, security is becoming an important consideration. At the same time, Open Radio Access Networks (RAN) are gaining more interest from mobile carriers and governments. Yet, Open RAN networks have serious security challenges, especially in the RAN fronthaul where there are strict timing requirements. This paper proposes MACsec as an efficient data link layer security solution that can assist in meeting these challenges.
  
  
• Interlaken: the ideal high-speed chip-to-chip interface (Sep. 26, 2022)
  As data consumption grows and chip designs evolve to meet this demand, Interlaken is the ideal high-speed chip-to-chip interface with efficiency, reliability and scalability.
  
  
• Moving from SoCs to Chiplets could help extend Moore's Law (Sep. 26, 2022)
  As Moore’s Law is again reaching its limits, several technologies, specifically Chiplets, could be the key to extending it for many more years.
  
  
• How to manage changing IP in an evolving SoC design (Sep. 23, 2022)
  IPs undergo multiple revisions due to evolving specifications and managing these changes as the SoC design evolves can become a nightmare.
  
  
• MACsec for Deterministic Ethernet applications (Sep. 19, 2022)
  Why MACsec is a compelling security solution for Deterministic Ethernet networks and how Packaged Intellectual Property solutions can accelerate time-to-market for chip developers
  
  
• Multi Voltage SoC Power Design Technique (Sep. 15, 2022)
  Minimizing power consumption is a major factor that contributes to the modern-day development of IC designs, especially in the consumer electronics segment.
  
  
• What's Really Behind the Adoption of eFPGA? (Sep. 08, 2022)
  System companies are taking a more proactive role in codesigning their hardware and software roadmaps, so it’s no surprise that they are also driving the adoption of embedded FPGAs (eFPGA.). But why and why has it taken so long?
  
  
• How to accelerate memory bandwidth by 50% with ZeroPoint technology (Sep. 05, 2022)
  Digitalization quickly accelerates energy consumption and is projected to stand for more than one-fifth of global electricity demand by 2030. This makes "performance per watt" critical. ZeroPoint technology for microchips delivers up to 50% more performance per watt by removing unnecessary information.
  
  
• eFPGAs Bring a 10X Advantage in Power and Cost (Sep. 02, 2022)
  eFPGA LUTs will out ship FPGA LUTs by the end of the century because of the advantages of reconfigurable logic being built into the chip: cost reduction, lower power and improved performance.
  
  
• Traceability Complements Agile Design (Aug. 29, 2022)
  Agile design methods have become mainstream in software development as traditional waterfall approaches cannot scale in large, fast-moving product schedules. System-on-chip (SoC) development teams have noticed and are enthusiastically adopting similar methods to accelerate schedules and become more nimble to in-process requirement changes.