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FPGA / CPLD Articles

• Safeguard your FPGA system with a secure authenticator (Nov. 24, 2014)
  This article outlines the general problems that counterfeiters pose for OEMs and end customers. It then turns to FPGA systems and explains how OEM system designers can address their concerns about the counterfeiting of FPGAs. Designers can secure their FPGA bitstream, protect IP, and prevent attached peripheral counterfeiting through use of secure authentication ICs that implement a SHA-256 or ECDSA algorithm.
  
  
• The IoT Spurs the Pursuit of Low Power (Oct. 24, 2014)
  It is getting increasingly difficult to attend a conference without seeing and hearing way too much of terms like Internet of Things (IoT) and Wearable Computing. But please keep reading. Submerged somewhere in the debate over whether there will be 20 billion or 40 billion IoT devices in five years, an unexpected fatality has gone unmarked. Dead as the proverbial doornail is the assumption that the newest semiconductor technology on the market is the best process technology for your next design. That idea perished an accidental victim of the IoT avalanche.
  
  
• Understanding Peak Floating-Point Performance Calculations (Oct. 21, 2014)
  Let's look at how we go about comparing the performance of the DSP, GPU, and FPGA architectures based on their peak FLOPS rating. The peak FLOPS rating is determined by multiplying the sum of the adders and multipliers by the maximum operation frequency.
  
  
• CPU Architects at the Brink: Where to Go Now? (Sep. 29, 2014)
  SoC architects at Hot Chips 2014 conference explored the Moore's Law, where processes don’t necessarily give you faster chips and the low-hanging architectural fruit has already been gathered. The answers are increasingly application-specific.
  
  
• Is FPGA power design ready for concurrent engineering? (Sep. 25, 2014)
  Is the complexity and potential consequences of late design cycle and worst-case FPGA power system design sufficient to justify adopting concurrent engineering practices?
  
  
• Wearing the Architecture: Evolution in Wearable Electronics (Sep. 01, 2014)
  The growth of wearable electronics—whether for biometrics, communication, or augmented reality—extends the concept of an embedded system into new, unexplored territory. Putting sensors and output devices on or in the human operator conjures up the coined word cyborg: a merging of human faculties with embedded systems.
  
  
• Can Software-Defined Radio Become Open Radio? (Aug. 14, 2014)
  Software-defined radio (SDR) is by now a grizzled veteran in the dusty waiting room of next big things. Apart from some deployments in battlefield radios, electronic countermeasures, and small-cell cellular base stations, it remains a great idea awaiting its chance at the big time. - See more at: http://www.altera.com/technology/system-design/articles/2014/software-defined-radio-openradio.html#sthash.9NgTfmog.dpuf
  
  
• Advanced Driver Assistance Systems: Let the Driver Beware! (Jul. 22, 2014)
  The rain shower begins near twilight, just as drivers were turning on their headlamps. Soon the wet pavement throws back a kaleidoscope of reflections from car lights, streetlights, shop signs, and the dying sun. The road seems cloaked in ambiguity as natural light fades, but the artificial glows of night are still unrevealing.
  
  
• The Internet of Things Can Drive Innovation - If You Understand Sensors (Jul. 10, 2014)
  A massive shift is happening in technology: everything is getting connected to the Internet. The convenience and power of the Internet makes these products much more valuable, so companies are rushing to get their Internet of Things (IoT) products to market. But success in this rush requires expertise in sensors, wireless communication, and data collection technology.
  
  
• The Virtualization Vortex (Jun. 25, 2014)
  An accelerating vortex of technology change is gathering rotational energy about a relatively simple concept in data-center computing. As it accelerates, this whirlpool of change may scour away existing concepts of server architecture and data-center networking, bend metro networks to its will, and draw even traditional embedded computing systems inexorably into the giant server complexes at the center of rotation.
  
  
• Efficiency and memory footprint of Xilkernel for the Microblaze soft processor (Jun. 19, 2014)
  The use of a real-time multitasking kernel simplifies the design process of embedded software, but the kernel requires some portion of system's resources. This paper describes results of research work performed to determine overheads incurred by Xilkernel, a real-time multitasking kernel developed by Xilinx.
  
  
• Implementing Floating-Point Algorithms in Real Hardware: Remember the Adaptation Step (May. 30, 2014)
  As more applications become more compute-intensive, a seeming detail—the way the application represents numbers internally—can make or break a project. This is no news for experienced digital signal processing (DSP) engineers—they live with this concern every day.
  
  
• IoT Security (May. 29, 2014)
  Enthusiastic promotion for the Internet of Things (IoT) is rising like an all-pervading dawn over the electronics landscape. From home automation to transportation systems to telemedicine, the concept of connecting local devices—or even individual actuators and sensors—to the Internet is illuminating new wonderful possibilities.
  
  
• Heterogeneous Computing Meets the Data Center (May. 05, 2014)
  This article describes how spiraling computing needs are drawing hardware accelerators, including FPGAs, into heterogeneous computing configurations in data centers
  
  
• Big Data: Where It Comes From, Where It Will Go (Mar. 18, 2014)
  The near future will see massive growth in mobile computing, in network traffic, and in the sheer size of data sets. These are all familiar trends, but often they are stated without reference to specifics. Even less often do discussions of these trends include mention of the impact they will have on hardware in the data center, through which all that data must eventually pass.
  
  
• Overcoming FPGA board design challenges (Mar. 17, 2014)
  If your board design experience with FPGAs is limited or nil, the prospect of putting one in your next project can be daunting – especially if it's a 1,000-pin monster. Continue reading to get a feel for the selection and design process, and for lots of gotchas you'll need to avoid.
  
  
• Zynq design from scratch (Mar. 13, 2014)
  Almost a year ago I received a parcel by post from US. When I opened the parcel I found this box. The ZedBoard was a present from someone involved in promoting the new Zynq device from Xilinx, but with no strings attached.
  
  
• The Next-Generation Cellular Network Takes Shape (Mar. 04, 2014)
  The global network supporting mobile devices is facing profound challenges to its architecture and to its underlying technology. Driven by cell phones’ own spectacular success, the number of mobile client devices and their individual appetites for bandwidth keep growing. But the bandwidth allocated to the mobile carriers is not increasing at anything approaching the same rate. And the efficiency with which the network can exploit a given channel is also leveling off. The next generation of the radio access network must deal with these challenges, and therein lies a tale. For
  
  
• Attaching Accelerators in Multicore Systems (Jan. 27, 2014)
  We have entered the age of heterogeneous multiprocessing. In high-performance computing applications, architects are adding hardware accelerators to the multicore CPU clusters in their huge supercomputers. At the other end of the spectrum, designers of embedded and mobile systems are moving critical code loops into hardware to slash energy consumption.
  
  
• A Clearing Picture of the Internet of Things (Dec. 06, 2013)
  By now most systems designers have a mental picture of the Internet of Things (IoT): an idea of its structure and its purpose. Unfortunately, this picture is likely to be wrong in both aspects. Judging by keynotes at ARM Techcon 2013, both the structure and function of the IoT are evolving in directions that neither the coiners of the phrase nor most observers have expected.
  
  
• ADCs in SoCs - Just a placeholder or a vital subsection? (Nov. 18, 2013)
  Analog to Digital Convertors (ADCs) are omnipresent in most embedded applications. This fact has lead manufacturers of microcontrollers and System on Chip (SoC) architectures to integrate one or more ADCs into their product offerings. In many applications, these integrated ADCs are good enough to replace a dedicated ADC used in the application. Careful selection of a SoC that has an ADC with specifications closely matching the application yields a compact system at a lower cost.
  
  
• Handling Asynchronous Clock Groups in SDC (Nov. 18, 2013)
  Most SoC designs in today's world employ multiple clocks and commonly have many clock domains. As data crosses from one clock domain to another within the design, the potential for metastability problems arises due to asynchronous clock domain crossings (CDCs).
  
  
• IP Quality Means Something Different if You Are Making Changes (Nov. 15, 2013)
  How to evaluate the quality of semiconductor intellectual property (IP)? That sounds like a question that was settled years ago, at least for industry-standard interface IP. But increasingly today, system designers—especially those who develop their own ASICs or FPGA-based implementations—use supposedly standard IP in distinctly non-standard ways.
  
  
• An Oversampling Technique for Serial Protocols (Oct. 10, 2013)
  Serial communication has long been an effective way of transmitting data with a minimum set of wires across long cables and different media. The serial data links that are in use vary in both transmission speeds and protocols. New serial protocols are constantly being brought to market. FPGAs with embedded SERDES blocks coupled with reconfigurable logic are effective in handling a wide range of serial communication protocols.
  
  
• The Third Decade: The FPGA as SoC (Sep. 12, 2013)
  In 2003, amidst the recessionary hangover from the dot-com crash, Altera began its third decade. It was a year of endings: the tragic loss of the space shuttle Columbia, the last contact with the spacecraft Pioneer 10, the last VW Beetle from the assembly line. And it was a year of beginnings: the Iraq War, the start of the great bull market in U.S. stocks, the first trans-sonic flight of the privately-developed SpaceShipOne, the first manned spaceflight by China.
  
  
• FinFETs, Analog Circuits, and Your Next System Design (Aug. 26, 2013)
  Everyone is talking about FinFETs—arguably the biggest change in transistors since commercialization of the MOSFET in the 1960s. But what does that future hold for a system developer who will use these SoCs?.
  
  
• Powering SoCs: Where Do the Regulators Go? (Jul. 29, 2013)
  Increasingly sophisticated SoCs, integrating many system components onto a single die, have in general simplified the system designer’s job. But these chips have made the power-delivery subsystem more complex. What used to be a straightforward task of routing Vcc from a supply connector to the ICs has become the design of an active network as complex as any other piece of the system.
  
  
• Functional Safety Certification for Subsystem Developers (Jun. 17, 2013)
  The rise of highly-automated systems in transportation and manufacturing has caused a profound change in the philosophy of system design. Increasing automation has shifted the responsibility for the safety of humans and property from the machine operator to the machine builders. This responsibility, and the processes and systems necessary to fulfill it, have become known collectively as functional safety.
  
  
• DO-254 Requirements Traceability (Jun. 05, 2013)
  This paper describes requirements traceability according to DO-254 guidance in the context of FPGAs, and provides explanations as to what it means for the applicants. This paper also enumerates the underlying purpose of requirements traceability and the benefits that can be achieved when done correctly.
  
  
• From Glue Logic to Subsystem: Altera's Second Decade (Jun. 04, 2013)
  In this second article in the Altera’s 30th Anniversary series, we see Altera expanding from CPLDs to FPGAs, and adapting to a world of RTL design, IP reuse, and CPU-based subsystems...