LPDDR5X/5/4X/4 PHY for 16nm
NVM EEPROM NeoEE in Maxchip (180nm, 150nm, 90nm)
TicoXS | JPEG XS 8K Encoder / Decoder IP-core
1.6T Ultra Ethernet IP Solution with PHY, Controller and Verification IP
Andes Technology D45-SE Processor Achieves ISO 26262 ASIL-D Certification for Functional Safety
VeriSilicon and Innobase collaboratively launched second-generation Yunbao series 5G RedCap/4G LTE dual-mode modem IP
ARM boost in $100bn Stargate data centre project
Accelerating RISC-V development with Tessent UltraSight-V
Automotive Ethernet Security Using MACsec
Optimizing Power Efficiency in SOC with PVT Sensor-Assisted DVFS Technology
AMBA LTI Verification IP for Arm System MMU
UCIe for 1.6T Interconnects in Next-Gen I/O Chiplets for AI data centers
Progressing on Track: PCIe 7.0 Specification, Version 0.7 Now Available for Member Review
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