MIPI D-PHY
High Bandwidth Out-of-Order RISC-V CPU IP Core
Secure-IC's Securyzr(TM) True Rendom Number Generator
RISC-V Application Processor
Ceva Collaborates with Arm and SynaXG to Redefine Energy Efficient 5G NR Processing for Sustainable LEO Satellites and 5G-Advanced Wireless Infrastructure
Semidynamics' Aliado SDK Accelerates AI Development for RISC-V with Seamless ONNX Integration
Ceva and Sharp Collaborate on "Beyond 5G" IoT Terminals
How the Ability to Manage Register Specifications Helps You Create More Competitive Products
Why RISC-V is a viable option for safety-critical applications
Dimensioning in 3D space: Object Volumetric Measurement by Leveraging Depth Camera-based Reconstruction on NVIDIA Edge devices
Guarding against the threat of clock attacks with analog IP
Three Key Benefits of ASIC Design and Turnkey Service
Introducing Cortex-A320: Ultra-efficient Armv9 CPU Optimized for IoT
© 2024 Design And Reuse
All Rights Reserved.
No portion of this site may be copied, retransmitted, reposted, duplicated or otherwise used without the express written permission of Design And Reuse.
Suppliers, list your IPs for free.