Very compact (500 LUTs) Camera Sensor Receiver Interface Converting from MIPI CSI-2 to AXI4-Stream Video Standard
Capless 1.8V output LDO with 2.0-3.6V input range - 0.18 EF
10/25/40/100G Ethernet MAC
MIPI D-PHY Rx IP, Silicon Proven in TSMC 28HPC+
Eliyan Ports Industry's Highest Performing PHY to Samsung Foundry SF4X Process Node, Achieving up to 40 Gbps Bandwidth at Unprecedented Power Levels with UCIe-Compliant Chiplet Interconnect Technology
Cadence Unveils Arm-Based System Chiplet
Arteris Selected by GigaDevice for Development in Next-Generation Automotive SoC With Enhanced FuSa Standards
Streamlining SoC Design with IDS-Integrate™
Last-Time Buy Notifications For Your ASICs? How To Make the Most of It
CANsec: Security for the Third Generation of the CAN Bus
World's First CXL 3.1 Multi-Vendor Interoperability Demo Showcases New Memory Possibilities for Hyperscale Data Centers
Behind the Scenes - Introducing Xiphera's Board
Why Choose Hard IP for Embedded FPGA in Aerospace and Defense Applications
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