MIPI D-PHY Tx-Only 4 Lanes in TSMC (16nm) for Automotive
65nm OTP Non Volatile Memory for Standard CMOS Logic Process
HEVC/AVC Dual-core Video Encoder HW IP
TSMC 4nm (N4P) 1.2V/1.8V Basekit Libraries
Weebit Nano licenses its ReRAM technology to onsemi
Ceva Unveils Ceva-Waves Links200 - A Breakthrough Multi-Protocol Wireless Connectivity Platform IP Featuring Next generation Bluetooth High Data Throughput (HDT) and IEEE 802.15.4
GUC Joins Arm Total Design Ecosystem to Strengthen ASIC Design Services
Quantum Readiness Considerations for Suppliers and Manufacturers
A Rad Hard ASIC Design Approach: Triple Modular Redundancy (TMR)
The Ideal Crypto Coprocessor with Root of Trust to Support Customer Complete Full Chip Evaluation: PUFcc gained SESIP and PSA Certified™ Level 3 RoT Component Certification
How PCIe® Technology is Connecting Disaggregated Systems for Generative AI
From Concept to Reality: Understanding the Cadence Analog IC Design Flow
Enhancing IoT System Performance with Smart Memory Partitioning
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