8b/10 Decoder
MIPI D-PHY / C-PHY Combo IP for TSMC (5nm, 6/7nm, 12/16nm, 22nm, 28nm, 40nm)
Multi-Protocol Engine with Classifier, Look-Aside, 5-10 Gbps
25kHz 1.71-5.5V Oscillator Low Power, ± 1% accuracy at @ 27◦C after trimming
Andes Technology D45-SE Processor Achieves ISO 26262 ASIL-D Certification for Functional Safety
VeriSilicon and Innobase collaboratively launched second-generation Yunbao series 5G RedCap/4G LTE dual-mode modem IP
Arm Chiplet System Architecture Makes New Strides in Accelerating the Evolution of Silicon
Accelerating RISC-V development with Tessent UltraSight-V
Automotive Ethernet Security Using MACsec
Optimizing Power Efficiency in SOC with PVT Sensor-Assisted DVFS Technology
AMBA LTI Verification IP for Arm System MMU
UCIe for 1.6T Interconnects in Next-Gen I/O Chiplets for AI data centers
Progressing on Track: PCIe 7.0 Specification, Version 0.7 Now Available for Member Review
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